TI: Rework SRAM definitions and maximums

[u-boot] / arch / arm / include / asm / arch-omap3 / omap.h

diff --git a/arch/arm/include/asm/arch-omap3/omap.h b/arch/arm/include/asm/arch-omap3/omap.h
index 194b93bf56dcedd2e71ae63d5a4986b80b769afd..417ff895f19e472b85870bd9aa7e78f7e9e64a15 100644 (file)
--- a/arch/arm/include/asm/arch-omap3/omap.h
+++ b/arch/arm/include/asm/arch-omap3/omap.h
@@ -10,6 +10,8 @@
 #ifndef _OMAP3_H_
 #define _OMAP3_H_
 
+#include <linux/sizes.h>
+
 /* Stuff on L3 Interconnect */
 #define SMX_APE_BASE                   0x68000000
 
@@ -51,6 +53,9 @@ struct control_prog_io {
 /* Bit definition for CONTROL_PROG_IO1 */
 #define PRG_I2C2_PULLUPRESX            0x00000001
 
+/* Scratchpad memory */
+#define OMAP34XX_SCRATCHPAD            (OMAP34XX_CTRL_BASE + 0x910)
+
 /* UART */
 #define OMAP34XX_UART1                 (OMAP34XX_L4_IO_BASE + 0x6a000)
 #define OMAP34XX_UART2                 (OMAP34XX_L4_IO_BASE + 0x6c000)
@@ -142,6 +147,8 @@ struct gpio {
 
 #define NON_SECURE_SRAM_START          0x40208000 /* Works for GP & EMU */
 #define NON_SECURE_SRAM_END            0x40210000
+#define NON_SECURE_SRAM_IMG_END                0x4020F000
+#define SRAM_SCRATCH_SPACE_ADDR                (NON_SECURE_SRAM_IMG_END - SZ_1K)
 
 #define LOW_LEVEL_SRAM_STACK           0x4020FFFC
 
@@ -245,4 +252,22 @@ struct gpio {
 /* ABB tranxdone mask */
 #define OMAP_ABB_MPU_TXDONE_MASK       (0x1 << 26)
 
+#define OMAP_REBOOT_REASON_OFFSET      0x04
+
+/* Boot parameters */
+#ifndef __ASSEMBLY__
+struct omap_boot_parameters {
+       unsigned int boot_message;
+       unsigned char boot_device;
+       unsigned char reserved;
+       unsigned char reset_reason;
+       unsigned char ch_flags;
+       unsigned int boot_device_descriptor;
+};
+
+int omap_reboot_mode(char *mode, unsigned int length);
+int omap_reboot_mode_clear(void);
+int omap_reboot_mode_store(char *mode);
+#endif
+
 #endif