u32 wait_on_value(u32, u32, void *, u32);
void sdelay(unsigned long);
void set_pl310_ctrl_reg(u32 val);
-void omap_rev_string(void);
void setup_clocks_for_console(void);
void prcm_init(void);
-void bypass_dpll(u32 *const base);
+void bypass_dpll(u32 const base);
void freq_update_core(void);
u32 get_sys_clk_freq(void);
u32 omap4_ddr_clk(void);
u32 cortex_rev(void);
void init_omap_revision(void);
void do_io_settings(void);
+void omap_vc_init(u16 speed_khz);
+int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
+u32 warm_reset(void);
+void force_emif_self_refresh(void);
/*
* This is used to verify if the configuration header
* was executed by Romcode prior to control of transfer
#endif
}
-static inline u32 omap_revision(void)
-{
- extern u32 *const omap4_revision;
- return *omap4_revision;
-}
-
#endif