TI: Rework SRAM definitions and maximums

[u-boot] / arch / arm / include / asm / arch-omap5 / omap.h

diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 2fd5cda6238f431e207372c0857d1b89f679b7c7..ef8e9752450e9c59638ded3eacdbfc2f8b3bfa20 100644 (file)
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -16,6 +16,8 @@
 #include <asm/types.h>
 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
 
+#include <linux/sizes.h>
+
 /*
  * L4 Peripherals - L4 Wakeup and L4 Core now
  */
@@ -186,11 +188,13 @@ struct s32ktimer {
 #if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
 #define NON_SECURE_SRAM_START  0x40300000
 #define NON_SECURE_SRAM_END    0x40380000      /* Not inclusive */
+#define NON_SECURE_SRAM_IMG_END        0x4037E000
 #else
 #define NON_SECURE_SRAM_START  0x40300000
 #define NON_SECURE_SRAM_END    0x40320000      /* Not inclusive */
+#define NON_SECURE_SRAM_IMG_END        0x4031E000
 #endif
-#define SRAM_SCRATCH_SPACE_ADDR        0x4031E000
+#define SRAM_SCRATCH_SPACE_ADDR        (NON_SECURE_SRAM_IMG_END - SZ_1K)
 
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE     0x4031F000