Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

[u-boot] / arch / arm / include / asm / arch-omap5 / sys_proto.h

diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h
index 3803ea9f55394e7daf47c3ec715280aaa7f5322f..e66ab44341ddcc3a4631944367d560652dfd713f 100644 (file)
--- a/arch/arm/include/asm/arch-omap5/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap5/sys_proto.h
@@ -25,9 +25,13 @@
 #include <asm/io.h>
 #include <asm/arch/clocks.h>
 #include <asm/omap_common.h>
-#include <asm/arch/mux_omap5.h>
 #include <asm/arch/clocks.h>
 
+struct pad_conf_entry {
+       u32 offset;
+       u32 val;
+};
+
 struct omap_sysinfo {
        char *board_string;
 };
@@ -42,10 +46,9 @@ void set_muxconf_regs_non_essential(void);
 void sr32(void *, u32, u32, u32);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);
-void omap_rev_string(char *omap_rev_string);
 void setup_clocks_for_console(void);
 void prcm_init(void);
-void bypass_dpll(u32 *const base);
+void bypass_dpll(u32 const base);
 void freq_update_core(void);
 u32 get_sys_clk_freq(void);
 u32 omap5_ddr_clk(void);
@@ -55,6 +58,12 @@ u32 omap_sdram_size(void);
 u32 cortex_rev(void);
 void init_omap_revision(void);
 void do_io_settings(void);
+void omap_vc_init(u16 speed_khz);
+int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
+u32 warm_reset(void);
+void force_emif_self_refresh(void);
+void get_ioregs(const struct ctrl_ioregs **regs);
+void srcomp_enable(void);
 
 /*
  * This is used to verify if the configuration header
@@ -75,15 +84,17 @@ static inline u32 running_from_sdram(void)
 static inline u8 uboot_loaded_by_spl(void)
 {
        /*
-        * Configuration Header is not supported yet, so u-boot init running
-        * from SDRAM implies that it was loaded by SPL. When this situation
-        * changes one of these approaches could be taken:
-        * i.  Pass a magic from SPL to U-Boot and U-Boot save it at a known
-        *     location.
-        * ii. Check the OPP. CH can support only 50% OPP while SPL initializes
-        *     the DPLLs at 100% OPP.
+        * u-boot can be running from sdram either because of configuration
+        * Header or by SPL. If because of CH, then the romcode sets the
+        * CHSETTINGS executed bit to true in the boot parameter structure that
+        * it passes to the bootloader.This parameter is stored in the ch_flags
+        * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
+        * mandatory section if CH is present.
         */
-       return running_from_sdram();
+       if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
+               return 0;
+       else
+               return running_from_sdram();
 }
 /*
  * The basic hardware init of OMAP(s_init()) can happen in 4
@@ -111,10 +122,4 @@ static inline u32 omap_hw_init_context(void)
 #endif
 }
 
-static inline u32 omap_revision(void)
-{
-       extern u32 *const omap5_revision;
-       return *omap5_revision;
-}
-
 #endif