Merge branch 'master' of git://git.denx.de/u-boot-sunxi

[u-boot] / arch / arm / include / asm / arch-rockchip / clock.h

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index b06bb6c9ec6948d01cd04452ef0849f7f784d401..1d5b3a07d04b482153f11e4bcd76935303927646 100644 (file)
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
  * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:    GPL-2.0
  */
 
 #ifndef _ASM_ARCH_CLOCK_H
@@ -19,6 +18,7 @@ enum {
        ROCKCHIP_SYSCON_PMUGRF,
        ROCKCHIP_SYSCON_PMUSGRF,
        ROCKCHIP_SYSCON_CIC,
+       ROCKCHIP_SYSCON_MSCH,
 };
 
 /* Standard Rockchip clock numbers */
@@ -38,6 +38,11 @@ static inline int rk_pll_id(enum rk_clk_id clk_id)
        return clk_id - 1;
 }
 
+struct sysreset_reg {
+       unsigned int glb_srst_fst_value;
+       unsigned int glb_srst_snd_value;
+};
+
 /**
  * clk_get_divisor() - Calculate the required clock divisior
  *
@@ -79,4 +84,14 @@ void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf);
 
 int rockchip_get_clk(struct udevice **devp);
 
+/*
+ * rockchip_reset_bind() - Bind soft reset device as child of clock device
+ *
+ * @pdev: clock udevice
+ * @reg_offset: the first offset in cru for softreset registers
+ * @reg_number: the reg numbers of softreset registers
+ * @return 0 success, or error value
+ */
+int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number);
+
 #endif