arch-stm32: Factorize stm32.h for STM32F4 and F7

[u-boot] / arch / arm / include / asm / arch-stm32f4 / stm32.h

diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h b/arch/arm/include/asm/arch-stm32f4/stm32.h
index 763b18cb541262f5947d3d6db263a8789f119b56..903931243c2c2fa84cce3e83fb51e30f8cd7c3c1 100644 (file)
--- a/arch/arm/include/asm/arch-stm32f4/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f4/stm32.h
@@ -11,17 +11,12 @@
 #ifndef _MACH_STM32_H_
 #define _MACH_STM32_H_
 
+#include <asm/arch-stm32/stm32f.h>
+
 /*
  * Peripheral memory map
  */
 #define STM32_SYSMEM_BASE      0x1FFF0000
-#define STM32_PERIPH_BASE      0x40000000
-#define STM32_APB1PERIPH_BASE  (STM32_PERIPH_BASE + 0x00000000)
-#define STM32_APB2PERIPH_BASE  (STM32_PERIPH_BASE + 0x00010000)
-#define STM32_AHB1PERIPH_BASE  (STM32_PERIPH_BASE + 0x00020000)
-#define STM32_AHB2PERIPH_BASE  (STM32_PERIPH_BASE + 0x10000000)
-
-#define STM32_BUS_MASK         0xFFFF0000
 
 /*
  * Register maps
@@ -37,15 +32,10 @@ struct stm32_u_id_regs {
  */
 #define STM32_U_ID_BASE                (STM32_SYSMEM_BASE + 0x7A10)
 #define STM32_U_ID             ((struct stm32_u_id_regs *)STM32_U_ID_BASE)
-
-#define FLASH_CNTL_BASE                (STM32_AHB1PERIPH_BASE + 0x3C00)
-
 static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
        [0 ... 3] =     16 * 1024,
        [4] =           64 * 1024,
        [5 ... 11] =    128 * 1024
 };
 
-void stm32_flash_latency_cfg(int latency);
-
 #endif /* _MACH_STM32_H_ */