tegra20: add clock_set_pllout function

[u-boot] / arch / arm / include / asm / arch-tegra / clock.h

diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h
index 3eff163e854ac420cb0336a918927ffc7b1730d6..eac1dc2662000219430cc43779690c48dfa13588 100644 (file)
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -57,6 +57,18 @@ enum clock_osc_freq clock_get_osc_freq(void);
 unsigned long clock_start_pll(enum clock_id id, u32 divm, u32 divn,
                u32 divp, u32 cpcon, u32 lfcon);
 
+/**
+ * Set PLL output frequency
+ *
+ * @param clkid        clock id
+ * @param pllout       pll output id
+ * @param rate         desired output rate
+ *
+ * @return 0 if ok, -1 on error (invalid clock id or no suitable divider)
+ */
+int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout,
+               unsigned rate);
+
 /**
  * Read low-level parameters of a PLL.
  *