Merge git://git.denx.de/u-boot-x86

[u-boot] / arch / arm / include / asm / arch-vf610 / imx-regs.h

diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h
index 436698588c2e5f40b32f658beb59a2b41e2b5ee4..ca97462c3505c81dd1e51fbc08146afb0136f4c0 100644 (file)
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -69,6 +69,7 @@
 #define USB_PHY0_BASE_ADDR  (AIPS0_BASE_ADDR + 0x00050800)
 #define USB_PHY1_BASE_ADDR  (AIPS0_BASE_ADDR + 0x00050C00)
 #define SCSC_BASE_ADDR         (AIPS0_BASE_ADDR + 0x00052000)
+#define DCU0_BASE_ADDR         (AIPS0_BASE_ADDR + 0x00058000)
 #define ASRC_BASE_ADDR         (AIPS0_BASE_ADDR + 0x00060000)
 #define SPDIF_BASE_ADDR                (AIPS0_BASE_ADDR + 0x00061000)
 #define ESAI_BASE_ADDR         (AIPS0_BASE_ADDR + 0x00062000)
@@ -98,6 +99,7 @@
 #define USBC1_BASE_ADDR     (AIPS1_BASE_ADDR + 0x00034000)
 #define ENET_BASE_ADDR         (AIPS1_BASE_ADDR + 0x00050000)
 #define ENET1_BASE_ADDR                (AIPS1_BASE_ADDR + 0x00051000)
+#define DCU1_BASE_ADDR         (AIPS1_BASE_ADDR + 0x00058000)
 #define NFC_BASE_ADDR          (AIPS1_BASE_ADDR + 0x00060000)
 
 #define QSPI0_AMBA_BASE                0x20000000
@@ -148,7 +150,7 @@
 #define DDRMC_CR18_TCKE(v)                             ((v) & 0x7)
 #define DDRMC_CR20_AP_EN                               (1 << 24)
 #define DDRMC_CR21_TRCD_INT(v)                         (((v) & 0xff) << 16)
-#define DDRMC_CR21_TRAS_LOCKOUT                                (1 << 8)
+#define DDRMC_CR21_TRAS_LOCKOUT(v)                     ((v) << 8)
 #define DDRMC_CR21_CCMAP_EN                            1
 #define DDRMC_CR22_TDAL(v)                             (((v) & 0x3f) << 16)
 #define DDRMC_CR23_BSTLEN(v)                           (((v) & 0x7) << 24)
@@ -200,8 +202,8 @@
 #define DDRMC_CR78_BUR_ON_FLY_BIT(v)                   ((v) & 0xf)
 #define DDRMC_CR79_CTLUPD_AREF(v)                      (((v) & 0x1) << 24)
 #define DDRMC_CR82_INT_MASK                            0x10000000
-#define DDRMC_CR87_ODT_WR_MAPCS0                       (1 << 24)
-#define DDRMC_CR87_ODT_RD_MAPCS0                       (1 << 16)
+#define DDRMC_CR87_ODT_WR_MAPCS0(v)                    ((v) << 24)
+#define DDRMC_CR87_ODT_RD_MAPCS0(v)                    ((v) << 16)
 #define DDRMC_CR88_TODTL_CMD(v)                                (((v) & 0x1f) << 16)
 #define DDRMC_CR89_AODT_RWSMCS(v)                      ((v) & 0xf)
 #define DDRMC_CR91_R2W_SMCSDL(v)                       (((v) & 0x7) << 16)
@@ -429,34 +431,6 @@ struct fuse_bank4_regs {
        u32 rsvd7[3];
 };
 
-/* UART */
-struct lpuart_fsl {
-       u8 ubdh;
-       u8 ubdl;
-       u8 uc1;
-       u8 uc2;
-       u8 us1;
-       u8 us2;
-       u8 uc3;
-       u8 ud;
-       u8 uma1;
-       u8 uma2;
-       u8 uc4;
-       u8 uc5;
-       u8 ued;
-       u8 umodem;
-       u8 uir;
-       u8 reserved;
-       u8 upfifo;
-       u8 ucfifo;
-       u8 usfifo;
-       u8 utwfifo;
-       u8 utcfifo;
-       u8 urwfifo;
-       u8 urcfifo;
-       u8 rsvd[28];
-};
-
 /* MSCM Interrupt Router */
 struct mscm_ir {
        u32 ircp0ir;