]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/include/asm/armv8/mmu.h
board: stm32: switch to DM STM32 timer
[u-boot] / arch / arm / include / asm / armv8 / mmu.h
index aa0f3c42f63211a4ff906fc51111fe6529a0f577..765914c7e269f03adf1d1d9ead59bd21d2f86ee8 100644 (file)
@@ -8,23 +8,6 @@
 #ifndef _ASM_ARMV8_MMU_H_
 #define _ASM_ARMV8_MMU_H_
 
-#ifdef __ASSEMBLY__
-#define _AC(X, Y)      X
-#else
-#define _AC(X, Y)      (X##Y)
-#endif
-
-#define UL(x)          _AC(x, UL)
-
-/***************************************************************/
-/*
- * The following definitions are related each other, shoud be
- * calculated specifically.
- */
-
-#define VA_BITS                        CONFIG_SYS_VA_BITS
-#define PTE_BLOCK_BITS         CONFIG_SYS_PTL2_BITS
-
 /*
  * block/section address mask and size definitions.
  */
@@ -33,7 +16,7 @@
 #undef  PAGE_SIZE
 #define PAGE_SHIFT             12
 #define PAGE_SIZE              (1 << PAGE_SHIFT)
-#define PAGE_MASK              (~(PAGE_SIZE-1))
+#define PAGE_MASK              (~(PAGE_SIZE - 1))
 
 /***************************************************************/
 
@@ -60,7 +43,9 @@
 #define PTE_TYPE_MASK          (3 << 0)
 #define PTE_TYPE_FAULT         (0 << 0)
 #define PTE_TYPE_TABLE         (3 << 0)
+#define PTE_TYPE_PAGE          (3 << 0)
 #define PTE_TYPE_BLOCK         (1 << 0)
+#define PTE_TYPE_VALID         (1 << 0)
 
 #define PTE_TABLE_PXN          (1UL << 59)
 #define PTE_TABLE_XN           (1UL << 60)
  */
 #define PMD_ATTRINDX(t)                ((t) << 2)
 #define PMD_ATTRINDX_MASK      (7 << 2)
+#define PMD_ATTRMASK           (PTE_BLOCK_PXN          | \
+                                PTE_BLOCK_UXN          | \
+                                PMD_ATTRINDX_MASK      | \
+                                PTE_TYPE_VALID)
 
 /*
  * TCR flags.