ARM: tegra: enable MIPI PAD CTRL support for Tegra124

[u-boot] / arch / arm / include / asm / macro.h

diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index 5f7c7e050145d626fc65bfb3b75f973865a3fbba..3cf3307b37a44333e4812705d16a344f977a5123 100644 (file)
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -100,6 +100,8 @@ lr  .req    x30
  * choose processor with all zero affinity value as the master.
  */
 .macro branch_if_slave, xreg, slave_label
+#ifdef CONFIG_ARMV8_MULTIENTRY
+       /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */
        mrs     \xreg, mpidr_el1
        tst     \xreg, #0xff            /* Test Affinity 0 */
        b.ne    \slave_label
@@ -112,6 +114,7 @@ lr  .req    x30
        lsr     \xreg, \xreg, #16
        tst     \xreg, #0xff            /* Test Affinity 3 */
        b.ne    \slave_label
+#endif
 .endm
 
 /*
@@ -119,12 +122,17 @@ lr        .req    x30
  * choose processor with all zero affinity value as the master.
  */
 .macro branch_if_master, xreg1, xreg2, master_label
+#ifdef CONFIG_ARMV8_MULTIENTRY
+       /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */
        mrs     \xreg1, mpidr_el1
        lsr     \xreg2, \xreg1, #32
        lsl     \xreg1, \xreg1, #40
        lsr     \xreg1, \xreg1, #40
        orr     \xreg1, \xreg1, \xreg2
        cbz     \xreg1, \master_label
+#else
+       b       \master_label
+#endif
 .endm
 
 .macro armv8_switch_to_el2_m, xreg1