]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/include/asm/omap_common.h
ARM: add assembly routine to switch to non-secure state
[u-boot] / arch / arm / include / asm / omap_common.h
index ad27db2a9438c58e776880266f61bcc3e1f005d6..61fee9f06dd3f30c3b6a00deba38ccc94545274d 100644 (file)
@@ -310,12 +310,6 @@ struct prcm_regs {
        u32 prm_vc_val_bypass;
        u32 prm_vc_cfg_i2c_mode;
        u32 prm_vc_cfg_i2c_clk;
-       u32 prm_sldo_core_setup;
-       u32 prm_sldo_core_ctrl;
-       u32 prm_sldo_mpu_setup;
-       u32 prm_sldo_mpu_ctrl;
-       u32 prm_sldo_mm_setup;
-       u32 prm_sldo_mm_ctrl;
        u32 prm_abbldo_mpu_setup;
        u32 prm_abbldo_mpu_ctrl;
 
@@ -340,10 +334,18 @@ struct prcm_regs {
        /* SCRM stuff, used by some boards */
        u32 scrm_auxclk0;
        u32 scrm_auxclk1;
+
+       /* GMAC Clk Ctrl */
+       u32 cm_gmac_gmac_clkctrl;
+       u32 cm_gmac_clkstctrl;
 };
 
 struct omap_sys_ctrl_regs {
        u32 control_status;
+       u32 control_core_mac_id_0_lo;
+       u32 control_core_mac_id_0_hi;
+       u32 control_core_mac_id_1_lo;
+       u32 control_core_mac_id_1_hi;
        u32 control_std_fuse_opp_vdd_mpu_2;
        u32 control_core_mmr_lock1;
        u32 control_core_mmr_lock2;
@@ -614,6 +616,7 @@ static inline u8 is_omap54xx(void)
 #define OMAP4430_ES2_3 0x44300230
 #define OMAP4460_ES1_0 0x44600100
 #define OMAP4460_ES1_1 0x44600110
+#define OMAP4470_ES1_0 0x44700100
 
 /* omap5 */
 #define OMAP5430_SILICON_ID_INVALID    0