#define PGTABLE_SIZE (0x10000)
/* 2MB granularity */
#define MMU_SECTION_SHIFT 21
+#define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT)
#ifndef __ASSEMBLY__
static inline unsigned int get_cr(void)
{
unsigned int val;
- asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc");
+ asm volatile("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc");
return val;
}
*/
void mmu_page_table_flush(unsigned long start, unsigned long stop);
-#ifdef CONFIG_SYS_NONCACHED_MEMORY
-void noncached_init(void);
-phys_addr_t noncached_alloc(size_t size, size_t align);
-#endif /* CONFIG_SYS_NONCACHED_MEMORY */
-
#endif /* __ASSEMBLY__ */
#define arch_align_stack(x) (x)
void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
enum dcache_option option);
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+void noncached_init(void);
+phys_addr_t noncached_alloc(size_t size, size_t align);
+#endif /* CONFIG_SYS_NONCACHED_MEMORY */
+
#endif /* __ASSEMBLY__ */
#endif