serial: zynq: Use BIT macros instead of shifts and full hex numbers

[u-boot] / arch / arm / lib / asm-offsets.c

diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c
index b0c26e5d689318195343152926eac50699cdd3d7..1a306ec4153b8a333fd7ce9a0061e98fc991ba74 100644 (file)
--- a/arch/arm/lib/asm-offsets.c
+++ b/arch/arm/lib/asm-offsets.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
  *
@@ -8,16 +9,12 @@
  * generate asm statements containing #defines,
  * compile this file to assembler, and then extract the
  * #defines from the assembly-language output.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <linux/kbuild.h>
+#include <linux/arm-smccc.h>
 
-#if defined(CONFIG_MB86R0x)
-#include <asm/arch/mb86r0x.h>
-#endif
 #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) \
        || defined(CONFIG_MX51) || defined(CONFIG_MX53)
 #include <asm/arch/imx-regs.h>
@@ -27,8 +24,6 @@ int main(void)
 {
        /*
         * TODO : Check if each entry in this file is really necessary.
-        *   - struct mb86r0x_ddr2
-        *   - struct mb86r0x_memc
         *   - struct esdramc_regs
         *   - struct max_regs
         *   - struct aips_regs
@@ -40,47 +35,6 @@ int main(void)
         * code. Is it better to define the macros directly in headers?
         */
 
-#if defined(CONFIG_MB86R0x)
-       /* ddr2 controller */
-       DEFINE(DDR2_DRIC, offsetof(struct mb86r0x_ddr2c, dric));
-       DEFINE(DDR2_DRIC1, offsetof(struct mb86r0x_ddr2c, dric1));
-       DEFINE(DDR2_DRIC2, offsetof(struct mb86r0x_ddr2c, dric2));
-       DEFINE(DDR2_DRCA, offsetof(struct mb86r0x_ddr2c, drca));
-       DEFINE(DDR2_DRCM, offsetof(struct mb86r0x_ddr2c, drcm));
-       DEFINE(DDR2_DRCST1, offsetof(struct mb86r0x_ddr2c, drcst1));
-       DEFINE(DDR2_DRCST2, offsetof(struct mb86r0x_ddr2c, drcst2));
-       DEFINE(DDR2_DRCR, offsetof(struct mb86r0x_ddr2c, drcr));
-       DEFINE(DDR2_DRCF, offsetof(struct mb86r0x_ddr2c, drcf));
-       DEFINE(DDR2_DRASR, offsetof(struct mb86r0x_ddr2c, drasr));
-       DEFINE(DDR2_DRIMS, offsetof(struct mb86r0x_ddr2c, drims));
-       DEFINE(DDR2_DROS, offsetof(struct mb86r0x_ddr2c, dros));
-       DEFINE(DDR2_DRIBSODT1, offsetof(struct mb86r0x_ddr2c, dribsodt1));
-       DEFINE(DDR2_DROABA, offsetof(struct mb86r0x_ddr2c, droaba));
-       DEFINE(DDR2_DROBS, offsetof(struct mb86r0x_ddr2c, drobs));
-
-       /* clock reset generator */
-       DEFINE(CRG_CRPR, offsetof(struct mb86r0x_crg, crpr));
-       DEFINE(CRG_CRHA, offsetof(struct mb86r0x_crg, crha));
-       DEFINE(CRG_CRPA, offsetof(struct mb86r0x_crg, crpa));
-       DEFINE(CRG_CRPB, offsetof(struct mb86r0x_crg, crpb));
-       DEFINE(CRG_CRHB, offsetof(struct mb86r0x_crg, crhb));
-       DEFINE(CRG_CRAM, offsetof(struct mb86r0x_crg, cram));
-
-       /* chip control module */
-       DEFINE(CCNT_CDCRC, offsetof(struct mb86r0x_ccnt, cdcrc));
-
-       /* external bus interface */
-       DEFINE(MEMC_MCFMODE0, offsetof(struct mb86r0x_memc, mcfmode[0]));
-       DEFINE(MEMC_MCFMODE2, offsetof(struct mb86r0x_memc, mcfmode[2]));
-       DEFINE(MEMC_MCFMODE4, offsetof(struct mb86r0x_memc, mcfmode[4]));
-       DEFINE(MEMC_MCFTIM0, offsetof(struct mb86r0x_memc, mcftim[0]));
-       DEFINE(MEMC_MCFTIM2, offsetof(struct mb86r0x_memc, mcftim[2]));
-       DEFINE(MEMC_MCFTIM4, offsetof(struct mb86r0x_memc, mcftim[4]));
-       DEFINE(MEMC_MCFAREA0, offsetof(struct mb86r0x_memc, mcfarea[0]));
-       DEFINE(MEMC_MCFAREA2, offsetof(struct mb86r0x_memc, mcfarea[2]));
-       DEFINE(MEMC_MCFAREA4, offsetof(struct mb86r0x_memc, mcfarea[4]));
-#endif
-
 #if defined(CONFIG_MX25)
        /* Clock Control Module */
        DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl));
@@ -244,5 +198,12 @@ int main(void)
        DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
 #endif
 
+#ifdef CONFIG_ARM_SMCCC
+       DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0));
+       DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
+       DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
+       DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
+#endif
+
        return 0;
 }