Merge branch 'master' of http://git.denx.de/u-boot-samsung

[u-boot] / arch / arm / lib / cache-cp15.c

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 8642010a17500cc8675b5ec03f851e1e8ba929bb..3e62d58542359c2f91e157a0954f9362a33b2817 100644 (file)
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -14,11 +14,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-void __arm_init_before_mmu(void)
+__weak void arm_init_before_mmu(void)
 {
 }
-void arm_init_before_mmu(void)
-       __attribute__((weak, alias("__arm_init_before_mmu")));
 
 __weak void arm_init_domains(void)
 {
@@ -44,14 +42,11 @@ void set_section_dcache(int section, enum dcache_option option)
        page_table[section] = value;
 }
 
-void __mmu_page_table_flush(unsigned long start, unsigned long stop)
+__weak void mmu_page_table_flush(unsigned long start, unsigned long stop)
 {
        debug("%s: Warning: not implemented\n", __func__);
 }
 
-void mmu_page_table_flush(unsigned long start, unsigned long stop)
-       __attribute__((weak, alias("__mmu_page_table_flush")));
-
 void mmu_set_region_dcache_behaviour(u32 start, int size,
                                     enum dcache_option option)
 {
@@ -74,7 +69,7 @@ __weak void dram_bank_mmu_setup(int bank)
 
        debug("%s: bank: %d\n", __func__, bank);
        for (i = bd->bi_dram[bank].start >> 20;
-            i < (bd->bi_dram[bank].start + bd->bi_dram[bank].size) >> 20;
+            i < (bd->bi_dram[bank].start >> 20) + (bd->bi_dram[bank].size >> 20);
             i++) {
 #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
                set_section_dcache(i, DCACHE_WRITETHROUGH);