arm: the ARM920T is THUMB capable, so select the appropriate ISA

[u-boot] / arch / arm / lib / cache-cp15.c

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index c65e068857a2737f58d3ec70535dbb156af3d468..8e185383a5bc3fb522ec8c885ac9effd32a3a7ef 100644 (file)
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -96,7 +96,7 @@ static inline void mmu_setup(void)
                dram_bank_mmu_setup(i);
        }
 
-#ifdef CONFIG_ARMV7
+#ifdef CONFIG_CPU_V7
        /* Set TTBR0 */
        reg = gd->arch.tlb_addr & TTBR0_BASE_ADDR_MASK;
 #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)