arm: mvebu: dram.c: Rework dram_init() and dram_init_banksize()

[u-boot] / arch / arm / lib / crt0_64.S

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 16540114323418895fb95f5afcf0176cc2c9b1b2..98a906ee111c6110bf0b5aa2b839bc2143ddd892 100644 (file)
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -61,7 +61,11 @@ ENTRY(_main)
 /*
  * Set up initial C runtime environment and call board_init_f(0).
  */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+       ldr     x0, =(CONFIG_SPL_STACK)
+#else
        ldr     x0, =(CONFIG_SYS_INIT_SP_ADDR)
+#endif
        sub     x18, x0, #GD_SIZE       /* allocate one GD above SP */
        bic     x18, x18, #0x7          /* 8-byte alignment for GD */
 zero_gd:
@@ -70,13 +74,15 @@ zero_gd:
        cmp     x0, x18
        b.gt    zero_gd
 #if defined(CONFIG_SYS_MALLOC_F_LEN)
-       sub     x0, x18, #CONFIG_SYS_MALLOC_F_LEN
+       ldr     x0, =CONFIG_SYS_MALLOC_F_LEN
+       sub     x0, x18, x0
        str     x0, [x18, #GD_MALLOC_BASE]
 #endif
        bic     sp, x0, #0xf    /* 16-byte alignment for ABI compliance */
        mov     x0, #0
        bl      board_init_f
 
+#if !defined(CONFIG_SPL_BUILD)
 /*
  * Set up intermediate environment (new sp and gd) and call
  * relocate_code(addr_moni). Trick here is that we'll return
@@ -119,4 +125,6 @@ clear_loop:
 
        /* NOTREACHED - board_init_r() does not return */
 
+#endif /* !CONFIG_SPL_BUILD */
+
 ENDPROC(_main)