Merge git://git.denx.de/u-boot-sh

[u-boot] / arch / arm / mach-at91 / arm926ejs / at91sam9m10g45_devices.c

diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
index 0e6c0da1bdd4cfeefb2c7f3e20d207550b76c4c6..eddfdb0853662b3392432ccf0ce68cc4f074f08c 100644 (file)
--- a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
@@ -7,8 +7,9 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <asm/io.h>
 
@@ -29,51 +30,40 @@
 
 void at91_serial0_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
-
        at91_set_a_periph(AT91_PIO_PORTB, 19, 1);       /* TXD0 */
        at91_set_a_periph(AT91_PIO_PORTB, 18, PUP);     /* RXD0 */
-       writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+       at91_periph_clk_enable(ATMEL_ID_USART0);
 }
 
 void at91_serial1_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
-
        at91_set_a_periph(AT91_PIO_PORTB, 4, 1);                /* TXD1 */
        at91_set_a_periph(AT91_PIO_PORTB, 5, PUP);              /* RXD1 */
-       writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+       at91_periph_clk_enable(ATMEL_ID_USART1);
 }
 
 void at91_serial2_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
-
        at91_set_a_periph(AT91_PIO_PORTD, 6, 1);                /* TXD2 */
        at91_set_a_periph(AT91_PIO_PORTD, 7, PUP);              /* RXD2 */
-       writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+       at91_periph_clk_enable(ATMEL_ID_USART2);
 }
 
 void at91_seriald_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
-
        at91_set_a_periph(AT91_PIO_PORTB, 12, 0);       /* DRXD */
        at91_set_a_periph(AT91_PIO_PORTB, 13, 1);       /* DTXD */
-       writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+       at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
-
        at91_set_a_periph(AT91_PIO_PORTB, 0, PUP);      /* SPI0_MISO */
        at91_set_a_periph(AT91_PIO_PORTB, 1, PUP);      /* SPI0_MOSI */
        at91_set_a_periph(AT91_PIO_PORTB, 2, PUP);      /* SPI0_SPCK */
 
-       /* Enable clock */
-       writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
+       at91_periph_clk_enable(ATMEL_ID_SPI0);
 
        if (cs_mask & (1 << 0)) {
                at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
@@ -103,14 +93,11 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
-
        at91_set_a_periph(AT91_PIO_PORTB, 14, PUP);     /* SPI1_MISO */
        at91_set_a_periph(AT91_PIO_PORTB, 15, PUP);     /* SPI1_MOSI */
        at91_set_a_periph(AT91_PIO_PORTB, 16, PUP);     /* SPI1_SPCK */
 
-       /* Enable clock */
-       writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
+       at91_periph_clk_enable(ATMEL_ID_SPI1);
 
        if (cs_mask & (1 << 0)) {
                at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
@@ -169,8 +156,6 @@ void at91_macb_hw_init(void)
 #ifdef CONFIG_GENERIC_ATMEL_MCI
 void at91_mci_hw_init(void)
 {
-       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
        at91_set_a_periph(AT91_PIO_PORTA, 0, 0);        /* MCI0 CLK */
        at91_set_a_periph(AT91_PIO_PORTA, 1, 0);        /* MCI0 CDA */
        at91_set_a_periph(AT91_PIO_PORTA, 2, 0);        /* MCI0 DA0 */
@@ -178,7 +163,23 @@ void at91_mci_hw_init(void)
        at91_set_a_periph(AT91_PIO_PORTA, 4, 0);        /* MCI0 DA2 */
        at91_set_a_periph(AT91_PIO_PORTA, 5, 0);        /* MCI0 DA3 */
 
-       /* Enable clock */
-       writel(1 << ATMEL_ID_MCI0, &pmc->pcer);
+       at91_periph_clk_enable(ATMEL_ID_MCI0);
 }
 #endif
+
+/* Platform data for the GPIOs */
+static const struct at91_port_platdata at91sam9260_plat[] = {
+       { ATMEL_BASE_PIOA, "PA" },
+       { ATMEL_BASE_PIOB, "PB" },
+       { ATMEL_BASE_PIOC, "PC" },
+       { ATMEL_BASE_PIOD, "PD" },
+       { ATMEL_BASE_PIOE, "PE" },
+};
+
+U_BOOT_DEVICES(at91sam9260_gpios) = {
+       { "gpio_at91", &at91sam9260_plat[0] },
+       { "gpio_at91", &at91sam9260_plat[1] },
+       { "gpio_at91", &at91sam9260_plat[2] },
+       { "gpio_at91", &at91sam9260_plat[3] },
+       { "gpio_at91", &at91sam9260_plat[4] },
+};