sunxi: Add base address for GIC

[u-boot] / arch / arm / mach-at91 / matrix.c

diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c
index 452a6b995c099fd7cd52f8310b0d0cc1d5c04aa3..57d72700d330e00e92f54ab074976ea7ad866511 100644 (file)
--- a/arch/arm/mach-at91/matrix.c
+++ b/arch/arm/mach-at91/matrix.c
@@ -15,29 +15,20 @@ void matrix_init(void)
        struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1;
        int i;
 
-       /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
-       for (i = 4; i <= 10; i++) {
+       /* DDR port 1 ~ port 7 */
+       for (i = H64MX_SLAVE_DDRC_PORT1; i <= H64MX_SLAVE_DDRC_PORT7; i++) {
                writel(0x000f0f0f, &h64mx->ssr[i]);
                writel(0x0000ffff, &h64mx->sassr[i]);
                writel(0x0000000f, &h64mx->srtsr[i]);
        }
 
-       /* CS3 */
-       writel(0x00c0c0c0, &h32mx->ssr[3]);
-       writel(0xff000000, &h32mx->sassr[3]);
-       writel(0xff000000, &h32mx->srtsr[3]);
+       /* EBI CS3 (NANDFlash 128M) and NFC Command Registers(128M) */
+       writel(0x00c0c0c0, &h32mx->ssr[H32MX_SLAVE_EBI]);
+       writel(0xff000000, &h32mx->sassr[H32MX_SLAVE_EBI]);
+       writel(0xff000000, &h32mx->srtsr[H32MX_SLAVE_EBI]);
 
        /* NFC SRAM */
-       writel(0x00010101, &h32mx->ssr[4]);
-       writel(0x00000001, &h32mx->sassr[4]);
-       writel(0x00000001, &h32mx->srtsr[4]);
-
-       /* Configure Programmable Security peripherals on matrix 64 */
-       writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
-       writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
-       writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
-
-       /* Configure Programmable Security peripherals on matrix 32 */
-       writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
-       writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
+       writel(0x00010101, &h32mx->ssr[H32MX_SLAVE_NFC_SRAM]);
+       writel(0x00000001, &h32mx->sassr[H32MX_SLAVE_NFC_SRAM]);
+       writel(0x00000001, &h32mx->srtsr[H32MX_SLAVE_NFC_SRAM]);
 }