]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/mach-at91/spl_at91.c
arm: at91: dts: Bring in device tree file for AT91SAM9G45
[u-boot] / arch / arm / mach-at91 / spl_at91.c
index af6fc0d4c611e1b3183058e74b9418d07c2e6d9e..cc3341acb537c4b4edf3a241f386a44c40220c9f 100644 (file)
@@ -14,7 +14,6 @@
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91sam9_matrix.h>
 #include <asm/arch/at91_pit.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/at91_wdt.h>
 #include <asm/arch/clk.h>
@@ -77,8 +76,6 @@ void __weak spl_board_init(void)
 
 void board_init_f(ulong dummy)
 {
-       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
        lowlevel_clock_init();
        at91_disable_wdt();
 
@@ -86,7 +83,7 @@ void board_init_f(ulong dummy)
         * At this stage the main oscillator is supposed to be enabled
         * PCK = MCK = MOSC
         */
-       writel(0x00, &pmc->pllicpr);
+       at91_pllicpr_init(0x00);
 
        /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
        at91_plla_init(CONFIG_SYS_AT91_PLLA);
@@ -115,12 +112,20 @@ void board_init_f(ulong dummy)
        timer_init();
 
        /* enable clocks for all PIOs */
+#if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
+       at91_periph_clk_enable(ATMEL_ID_PIOAB);
+       at91_periph_clk_enable(ATMEL_ID_PIOCD);
+#else
        at91_periph_clk_enable(ATMEL_ID_PIOA);
        at91_periph_clk_enable(ATMEL_ID_PIOB);
        at91_periph_clk_enable(ATMEL_ID_PIOC);
+#endif
+
+#if defined(CONFIG_SPL_SERIAL_SUPPORT)
        /* init console */
        at91_seriald_hw_init();
        preloader_console_init();
+#endif
 
        mem_init();