*/
#include <common.h>
+#include <asm/io.h>
+#include <asm/mach-imx/sys_proto.h>
#include <command.h>
+#include <imx_sip.h>
+#include <linux/compiler.h>
-/* Allow for arch specific config before we boot */
-static int __arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
+int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
{
- /* please define platform specific arch_auxiliary_core_up() */
- return CMD_RET_FAILURE;
-}
+ ulong stack, pc;
-int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
- __attribute__((weak, alias("__arch_auxiliary_core_up")));
+ if (!boot_private_data)
+ return -EINVAL;
+
+ stack = *(ulong *)boot_private_data;
+ pc = *(ulong *)(boot_private_data + 4);
+
+ /* Set the stack and pc to M4 bootROM */
+ writel(stack, M4_BOOTROM_BASE_ADDR);
+ writel(pc, M4_BOOTROM_BASE_ADDR + 4);
+
+ /* Enable M4 */
+#ifdef CONFIG_MX8M
+ call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0);
+#else
+ clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
+ SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK);
+#endif
-/* Allow for arch specific config before we boot */
-static int __arch_auxiliary_core_check_up(u32 core_id)
-{
- /* please define platform specific arch_auxiliary_core_check_up() */
return 0;
}
int arch_auxiliary_core_check_up(u32 core_id)
- __attribute__((weak, alias("__arch_auxiliary_core_check_up")));
+{
+#ifdef CONFIG_MX8M
+ return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0);
+#else
+ unsigned int val;
+
+ val = readl(SRC_BASE_ADDR + SRC_M4_REG_OFFSET);
+
+ if (val & SRC_M4C_NON_SCLR_RST_MASK)
+ return 0; /* assert in reset */
+
+ return 1;
+#endif
+}
/*
* To i.MX6SX and i.MX7D, the image supported by bootaux needs
* The TCMUL is mapped to (M4_BOOTROM_BASE_ADDR) at A core side for
* accessing the M4 TCMUL.
*/
-int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
int ret, up;