ARM: k2g: Add clock information

[u-boot] / arch / arm / mach-keystone / include / mach / clock-k2e.h

diff --git a/arch/arm/mach-keystone/include/mach/clock-k2e.h b/arch/arm/mach-keystone/include/mach/clock-k2e.h
index 6f53e43f0ae16c99b80b879c84d003e907b2d874..4618560dd8737c86b05a641c8c65161c3e2a9fa1 100644 (file)
--- a/arch/arm/mach-keystone/include/mach/clock-k2e.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2e.h
@@ -10,54 +10,10 @@
 #ifndef __ASM_ARCH_CLOCK_K2E_H
 #define __ASM_ARCH_CLOCK_K2E_H
 
-enum ext_clk_e {
-       sys_clk,
-       alt_core_clk,
-       pa_clk,
-       ddr3_clk,
-       mcm_clk,
-       pcie_clk,
-       sgmii_clk,
-       xgmii_clk,
-       usb_clk,
-       ext_clk_count /* number of external clocks */
-};
-
-extern unsigned int external_clk[ext_clk_count];
-
-#define CLK_LIST(CLK)\
-       CLK(0, core_pll_clk)\
-       CLK(1, pass_pll_clk)\
-       CLK(2, ddr3_pll_clk)\
-       CLK(3, sys_clk0_clk)\
-       CLK(4, sys_clk0_1_clk)\
-       CLK(5, sys_clk0_2_clk)\
-       CLK(6, sys_clk0_3_clk)\
-       CLK(7, sys_clk0_4_clk)\
-       CLK(8, sys_clk0_6_clk)\
-       CLK(9, sys_clk0_8_clk)\
-       CLK(10, sys_clk0_12_clk)\
-       CLK(11, sys_clk0_24_clk)\
-       CLK(12, sys_clk1_clk)\
-       CLK(13, sys_clk1_3_clk)\
-       CLK(14, sys_clk1_4_clk)\
-       CLK(15, sys_clk1_6_clk)\
-       CLK(16, sys_clk1_12_clk)\
-       CLK(17, sys_clk2_clk)\
-       CLK(18, sys_clk3_clk)
-
 #define PLLSET_CMD_LIST        "<pa|ddr3>"
 
 #define KS2_CLK1_6     sys_clk0_6_clk
 
-/* PLL identifiers */
-enum pll_type_e {
-       CORE_PLL,
-       PASS_PLL,
-       DDR3_PLL,
-       TETRIS_PLL,
-};
-
 #define CORE_PLL_800   {CORE_PLL, 16, 1, 2}
 #define CORE_PLL_850   {CORE_PLL, 17, 1, 2}
 #define CORE_PLL_1000  {CORE_PLL, 20, 1, 2}