ARM: k2g: Add ddr3 info

[u-boot] / arch / arm / mach-keystone / include / mach / hardware.h

diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index 16cbcee12b58534ac93afb3dfd0721ced3192eea..2fd5b2350b029720ad0c5fa8b3daba08ad5bb1ca 100644 (file)
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -24,8 +24,6 @@ typedef volatile unsigned int   *dv_reg_p;
 
 #endif
 
-#define                BIT(x)  (1 << (x))
-
 #define KS2_DDRPHY_PIR_OFFSET           0x04
 #define KS2_DDRPHY_PGCR0_OFFSET         0x08
 #define KS2_DDRPHY_PGCR1_OFFSET         0x0C
@@ -54,6 +52,10 @@ typedef volatile unsigned int   *dv_reg_p;
 #define KS2_DDRPHY_ZQ2CR1_OFFSET        0x1A4
 #define KS2_DDRPHY_ZQ3CR1_OFFSET        0x1B4
 
+#define KS2_DDRPHY_DATX8_4_OFFSET       0x2C0
+#define KS2_DDRPHY_DATX8_5_OFFSET       0x300
+#define KS2_DDRPHY_DATX8_6_OFFSET       0x340
+#define KS2_DDRPHY_DATX8_7_OFFSET       0x380
 #define KS2_DDRPHY_DATX8_8_OFFSET       0x3C0
 
 #define IODDRM_MASK                     0x00000180
@@ -165,8 +167,12 @@ typedef volatile unsigned int   *dv_reg_p;
 #define KS2_PASSPLLCTL1                        (KS2_DEVICE_STATE_CTRL_BASE + 0x35C)
 #define KS2_DDR3APLLCTL0               (KS2_DEVICE_STATE_CTRL_BASE + 0x360)
 #define KS2_DDR3APLLCTL1               (KS2_DEVICE_STATE_CTRL_BASE + 0x364)
+#define KS2_DDR3BPLLCTL0               (KS2_DEVICE_STATE_CTRL_BASE + 0x368)
+#define KS2_DDR3BPLLCTL1               (KS2_DEVICE_STATE_CTRL_BASE + 0x36C)
 #define KS2_ARMPLLCTL0                 (KS2_DEVICE_STATE_CTRL_BASE + 0x370)
 #define KS2_ARMPLLCTL1                 (KS2_DEVICE_STATE_CTRL_BASE + 0x374)
+#define KS2_UARTPLLCTL0                        (KS2_DEVICE_STATE_CTRL_BASE + 0x390)
+#define KS2_UARTPLLCTL1                        (KS2_DEVICE_STATE_CTRL_BASE + 0x394)
 
 #define KS2_PLL_CNTRL_BASE             0x02310000
 #define KS2_CLOCK_BASE                 KS2_PLL_CNTRL_BASE
@@ -237,6 +243,25 @@ typedef volatile unsigned int   *dv_reg_p;
 /* SGMII SerDes */
 #define KS2_SGMII_SERDES_BASE          0x0232a000
 
+/* JTAG ID register */
+#define JTAGID_VARIANT_SHIFT   28
+#define JTAGID_VARIANT_MASK    (0xf << 28)
+#define JTAGID_PART_NUM_SHIFT  12
+#define JTAGID_PART_NUM_MASK   (0xffff << 12)
+
+/* PART NUMBER definitions */
+#define CPU_66AK2Hx    0xb981
+#define CPU_66AK2Ex    0xb9a6
+#define CPU_66AK2Lx    0xb9a7
+#define CPU_66AK2Gx    0xbb06
+
+/* DEVSPEED register */
+#define DEVSPEED_DEVSPEED_SHIFT        16
+#define DEVSPEED_DEVSPEED_MASK (0xfff << 16)
+#define DEVSPEED_ARMSPEED_SHIFT        0
+#define DEVSPEED_ARMSPEED_MASK 0xfff
+#define DEVSPEED_NUMSPDS       12
+
 #ifdef CONFIG_SOC_K2HK
 #include <asm/arch/hardware-k2hk.h>
 #endif
@@ -249,35 +274,43 @@ typedef volatile unsigned int   *dv_reg_p;
 #include <asm/arch/hardware-k2l.h>
 #endif
 
+#ifdef CONFIG_SOC_K2G
+#include <asm/arch/hardware-k2g.h>
+#endif
+
 #ifndef __ASSEMBLY__
-static inline int cpu_is_k2hk(void)
+
+static inline u16 get_part_number(void)
 {
-       unsigned int jtag_id    = __raw_readl(KS2_JTAG_ID_REG);
-       unsigned int part_no    = (jtag_id >> 12) & 0xffff;
+       u32 jtag_id = __raw_readl(KS2_JTAG_ID_REG);
 
-       return (part_no == 0xb981) ? 1 : 0;
+       return (jtag_id & JTAGID_PART_NUM_MASK) >> JTAGID_PART_NUM_SHIFT;
 }
 
-static inline int cpu_is_k2e(void)
+static inline u8 cpu_is_k2hk(void)
 {
-       unsigned int jtag_id    = __raw_readl(KS2_JTAG_ID_REG);
-       unsigned int part_no    = (jtag_id >> 12) & 0xffff;
+       return get_part_number() == CPU_66AK2Hx;
+}
 
-       return (part_no == 0xb9a6) ? 1 : 0;
+static inline u8 cpu_is_k2e(void)
+{
+       return get_part_number() == CPU_66AK2Ex;
 }
 
-static inline int cpu_is_k2l(void)
+static inline u8 cpu_is_k2l(void)
 {
-       unsigned int jtag_id    = __raw_readl(KS2_JTAG_ID_REG);
-       unsigned int part_no    = (jtag_id >> 12) & 0xffff;
+       return get_part_number() == CPU_66AK2Lx;
+}
 
-       return (part_no == 0xb9a7) ? 1 : 0;
+static inline u8 cpu_is_k2g(void)
+{
+       return get_part_number() == CPU_66AK2Gx;
 }
 
-static inline int cpu_revision(void)
+static inline u8 cpu_revision(void)
 {
-       unsigned int jtag_id    = __raw_readl(KS2_JTAG_ID_REG);
-       unsigned int rev        = (jtag_id >> 28) & 0xf;
+       u32 jtag_id     = __raw_readl(KS2_JTAG_ID_REG);
+       u8 rev  = (jtag_id & JTAGID_VARIANT_MASK) >> JTAGID_VARIANT_SHIFT;
 
        return rev;
 }