#endif
-#define BIT(x) (1 << (x))
-
#define KS2_DDRPHY_PIR_OFFSET 0x04
#define KS2_DDRPHY_PGCR0_OFFSET 0x08
#define KS2_DDRPHY_PGCR1_OFFSET 0x0C
#define KS2_DDRPHY_ZQ2CR1_OFFSET 0x1A4
#define KS2_DDRPHY_ZQ3CR1_OFFSET 0x1B4
+#define KS2_DDRPHY_DATX8_4_OFFSET 0x2C0
+#define KS2_DDRPHY_DATX8_5_OFFSET 0x300
+#define KS2_DDRPHY_DATX8_6_OFFSET 0x340
+#define KS2_DDRPHY_DATX8_7_OFFSET 0x380
#define KS2_DDRPHY_DATX8_8_OFFSET 0x3C0
#define IODDRM_MASK 0x00000180
#define KS2_DDR3BPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x36C)
#define KS2_ARMPLLCTL0 (KS2_DEVICE_STATE_CTRL_BASE + 0x370)
#define KS2_ARMPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x374)
+#define KS2_UARTPLLCTL0 (KS2_DEVICE_STATE_CTRL_BASE + 0x390)
+#define KS2_UARTPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x394)
#define KS2_PLL_CNTRL_BASE 0x02310000
#define KS2_CLOCK_BASE KS2_PLL_CNTRL_BASE
#define CPU_66AK2Hx 0xb981
#define CPU_66AK2Ex 0xb9a6
#define CPU_66AK2Lx 0xb9a7
+#define CPU_66AK2Gx 0xbb06
/* DEVSPEED register */
#define DEVSPEED_DEVSPEED_SHIFT 16
#include <asm/arch/hardware-k2l.h>
#endif
+#ifdef CONFIG_SOC_K2G
+#include <asm/arch/hardware-k2g.h>
+#endif
+
#ifndef __ASSEMBLY__
static inline u16 get_part_number(void)
return get_part_number() == CPU_66AK2Lx;
}
+static inline u8 cpu_is_k2g(void)
+{
+ return get_part_number() == CPU_66AK2Gx;
+}
+
static inline u8 cpu_revision(void)
{
u32 jtag_id = __raw_readl(KS2_JTAG_ID_REG);