Merge branch 'master' of git://git.denx.de/u-boot-i2c; branch 'master' of git://git...

[u-boot] / arch / arm / mach-mvebu / cpu.c

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index c9b9c77ec495f36c4a2fc6a74fc27370340a17fb..30b175c64657111fcd536bb6a7bf80f0c7553490 100644 (file)
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2014-2015 Stefan Roese <sr@denx.de>
+ * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
@@ -49,25 +49,103 @@ int mvebu_soc_family(void)
 {
        u16 devid = (readl(MVEBU_REG_PCIE_DEVID) >> 16) & 0xffff;
 
-       if ((devid == SOC_MV78260_ID) || (devid == SOC_MV78460_ID))
+       switch (devid) {
+       case SOC_MV78230_ID:
+       case SOC_MV78260_ID:
+       case SOC_MV78460_ID:
                return MVEBU_SOC_AXP;
-
-       if (devid == SOC_88F6810_ID || devid == SOC_88F6820_ID ||
-           devid == SOC_88F6828_ID)
+       case SOC_88F6810_ID:
+       case SOC_88F6820_ID:
+       case SOC_88F6828_ID:
                return MVEBU_SOC_A38X;
-
+       }
        return MVEBU_SOC_UNKNOWN;
 }
 
 #if defined(CONFIG_DISPLAY_CPUINFO)
+
+#if defined(CONFIG_ARMADA_38X)
+/* SAR frequency values for Armada 38x */
+static const struct sar_freq_modes sar_freq_tab[] = {
+       {  0x0,  0x0,  666, 333, 333 },
+       {  0x2,  0x0,  800, 400, 400 },
+       {  0x4,  0x0, 1066, 533, 533 },
+       {  0x6,  0x0, 1200, 600, 600 },
+       {  0x8,  0x0, 1332, 666, 666 },
+       {  0xc,  0x0, 1600, 800, 800 },
+       { 0xff, 0xff,    0,   0,   0 }  /* 0xff marks end of array */
+};
+#else
+/* SAR frequency values for Armada XP */
+static const struct sar_freq_modes sar_freq_tab[] = {
+       {  0xa,  0x5,  800, 400, 400 },
+       {  0x1,  0x5, 1066, 533, 533 },
+       {  0x2,  0x5, 1200, 600, 600 },
+       {  0x2,  0x9, 1200, 600, 400 },
+       {  0x3,  0x5, 1333, 667, 667 },
+       {  0x4,  0x5, 1500, 750, 750 },
+       {  0x4,  0x9, 1500, 750, 500 },
+       {  0xb,  0x9, 1600, 800, 533 },
+       {  0xb,  0xa, 1600, 800, 640 },
+       {  0xb,  0x5, 1600, 800, 800 },
+       { 0xff, 0xff,    0,   0,   0 }  /* 0xff marks end of array */
+};
+#endif
+
+void get_sar_freq(struct sar_freq_modes *sar_freq)
+{
+       u32 val;
+       u32 freq;
+       int i;
+
+       val = readl(CONFIG_SAR_REG);    /* SAR - Sample At Reset */
+       freq = (val & SAR_CPU_FREQ_MASK) >> SAR_CPU_FREQ_OFFS;
+#if !defined(CONFIG_ARMADA_38X)
+       /*
+        * Shift CPU0 clock frequency select bit from SAR2 register
+        * into correct position
+        */
+       freq |= ((readl(CONFIG_SAR2_REG) & SAR2_CPU_FREQ_MASK)
+                >> SAR2_CPU_FREQ_OFFS) << 3;
+#endif
+       for (i = 0; sar_freq_tab[i].val != 0xff; i++) {
+               if (sar_freq_tab[i].val == freq) {
+#if defined(CONFIG_ARMADA_38X)
+                       *sar_freq = sar_freq_tab[i];
+                       return;
+#else
+                       int k;
+                       u8 ffc;
+
+                       ffc = (val & SAR_FFC_FREQ_MASK) >>
+                               SAR_FFC_FREQ_OFFS;
+                       for (k = i; sar_freq_tab[k].ffc != 0xff; k++) {
+                               if (sar_freq_tab[k].ffc == ffc) {
+                                       *sar_freq = sar_freq_tab[k];
+                                       return;
+                               }
+                       }
+                       i = k;
+#endif
+               }
+       }
+
+       /* SAR value not found, return 0 for frequencies */
+       *sar_freq = sar_freq_tab[i - 1];
+}
+
 int print_cpuinfo(void)
 {
        u16 devid = (readl(MVEBU_REG_PCIE_DEVID) >> 16) & 0xffff;
        u8 revid = readl(MVEBU_REG_PCIE_REVID) & 0xff;
+       struct sar_freq_modes sar_freq;
 
        puts("SoC:   ");
 
        switch (devid) {
+       case SOC_MV78230_ID:
+               puts("MV78230-");
+               break;
        case SOC_MV78260_ID:
                puts("MV78260-");
                break;
@@ -91,13 +169,13 @@ int print_cpuinfo(void)
        if (mvebu_soc_family() == MVEBU_SOC_AXP) {
                switch (revid) {
                case 1:
-                       puts("A0\n");
+                       puts("A0");
                        break;
                case 2:
-                       puts("B0\n");
+                       puts("B0");
                        break;
                default:
-                       printf("?? (%x)\n", revid);
+                       printf("?? (%x)", revid);
                        break;
                }
        }
@@ -105,17 +183,20 @@ int print_cpuinfo(void)
        if (mvebu_soc_family() == MVEBU_SOC_A38X) {
                switch (revid) {
                case MV_88F68XX_Z1_ID:
-                       puts("Z1\n");
+                       puts("Z1");
                        break;
                case MV_88F68XX_A0_ID:
-                       puts("A0\n");
+                       puts("A0");
                        break;
                default:
-                       printf("?? (%x)\n", revid);
+                       printf("?? (%x)", revid);
                        break;
                }
        }
 
+       get_sar_freq(&sar_freq);
+       printf(" at %d MHz\n", sar_freq.p_clk);
+
        return 0;
 }
 #endif /* CONFIG_DISPLAY_CPUINFO */