arm: mvebu: Add DM and OF_CONTROL support to SPL

[u-boot] / arch / arm / mach-mvebu / include / mach / soc.h

diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index a8a6b27d802b7c4e4dc9caa512e49b9daaf72c87..800f5d55a2504f062abd879a9dedc0e0d56ed752 100644 (file)
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -11,8 +11,6 @@
 #ifndef _MVEBU_SOC_H
 #define _MVEBU_SOC_H
 
-#define BIT(x)                 (1 << (x))
-
 #define SOC_MV78460_ID         0x7846
 #define SOC_88F6810_ID         0x6810
 #define SOC_88F6820_ID         0x6820
@@ -33,7 +31,7 @@
 /* SOC specific definations */
 #define INTREG_BASE            0xd0000000
 #define INTREG_BASE_ADDR_REG   (INTREG_BASE + 0x20080)
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYS_MVEBU_DDR_A38X)
+#if defined(CONFIG_SPL_BUILD)
 /*
  * On A38x switching the regs base address without running from
  * SDRAM doesn't seem to work. So let the SPL still use the
@@ -51,8 +49,6 @@
 #define CONFIG_SYS_PL310_BASE  MVEBU_L2_CACHE_BASE
 #define MVEBU_SPI_BASE         (MVEBU_REGISTER(0x10600))
 #define MVEBU_TWSI_BASE                (MVEBU_REGISTER(0x11000))
-#define MVEBU_UART0_BASE       (MVEBU_REGISTER(0x12000))
-#define MVEBU_UART1_BASE       (MVEBU_REGISTER(0x12100))
 #define MVEBU_MPP_BASE         (MVEBU_REGISTER(0x18000))
 #define MVEBU_GPIO0_BASE       (MVEBU_REGISTER(0x18100))
 #define MVEBU_GPIO1_BASE       (MVEBU_REGISTER(0x18140))