Merge git://git.denx.de/u-boot-rockchip

[u-boot] / arch / arm / mach-omap2 / am33xx / board.c

diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index 581c0ab518b2f88bf86a914e0c3202d63c376db5..ea0cabad972624b2620ec6f181da5486fd93d2e0 100644 (file)
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <debug_uart.h>
 #include <errno.h>
 #include <ns16550.h>
 #include <spl.h>
@@ -25,6 +26,7 @@
 #include <asm/io.h>
 #include <asm/emif.h>
 #include <asm/gpio.h>
+#include <asm/omap_common.h>
 #include <i2c.h>
 #include <miiphy.h>
 #include <cpsw.h>
@@ -38,16 +40,43 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int dram_init(void)
+{
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+       sdram_init();
+#endif
+
+       /* dram_init must store complete ramsize in gd->ram_size */
+       gd->ram_size = get_ram_size(
+                       (void *)CONFIG_SYS_SDRAM_BASE,
+                       CONFIG_MAX_RAM_BANK_SIZE);
+       return 0;
+}
+
+int dram_init_banksize(void)
+{
+       gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+       gd->bd->bi_dram[0].size = gd->ram_size;
+
+       return 0;
+}
+
 #if !CONFIG_IS_ENABLED(OF_CONTROL)
 static const struct ns16550_platdata am33xx_serial[] = {
-       { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+       { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2,
+         .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
 # ifdef CONFIG_SYS_NS16550_COM2
-       { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+       { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2,
+         .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
 #  ifdef CONFIG_SYS_NS16550_COM3
-       { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
-       { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
-       { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
-       { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+       { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2,
+         .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
+       { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2,
+         .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
+       { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2,
+         .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
+       { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2,
+         .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
 #  endif
 # endif
 };
@@ -105,7 +134,7 @@ static const struct gpio_bank gpio_bank_am33xx[] = {
 const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx;
 #endif
 
-#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_MMC_OMAP_HS)
 int cpu_mmc_init(bd_t *bis)
 {
        int ret;
@@ -184,11 +213,9 @@ static struct musb_hdrc_platform_data otg1_plat = {
        .board_data     = &otg1_board_data,
 };
 #endif
-#endif
 
 int arch_misc_init(void)
 {
-#ifndef CONFIG_DM_USB
 #ifdef CONFIG_AM335X_USB0
        musb_register(&otg0_plat, &otg0_board_data,
                (void *)USB0_OTG_BASE);
@@ -197,17 +224,33 @@ int arch_misc_init(void)
        musb_register(&otg1_plat, &otg1_board_data,
                (void *)USB1_OTG_BASE);
 #endif
-#else
+       return 0;
+}
+
+#else  /* CONFIG_USB_MUSB_* && CONFIG_AM335X_USB* && !CONFIG_DM_USB */
+
+int arch_misc_init(void)
+{
        struct udevice *dev;
        int ret;
 
        ret = uclass_first_device(UCLASS_MISC, &dev);
        if (ret || !dev)
                return ret;
+
+#if defined(CONFIG_DM_ETH) && defined(CONFIG_USB_ETHER)
+       ret = usb_ether_init();
+       if (ret) {
+               pr_err("USB ether init failed\n");
+               return ret;
+       }
 #endif
+
        return 0;
 }
 
+#endif /* CONFIG_USB_MUSB_* && CONFIG_AM335X_USB* && !CONFIG_DM_USB */
+
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 /*
  * In the case of non-SPL based booting we'll want to call these
@@ -228,8 +271,6 @@ int board_early_init_f(void)
  */
 __weak void am33xx_spl_board_init(void)
 {
-       do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
-       do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
 }
 
 #if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
@@ -298,9 +339,23 @@ void early_system_init(void)
        set_uart_mux_conf();
        setup_early_clocks();
        uart_soft_reset();
+#ifdef CONFIG_SPL_BUILD
+       /*
+        * Save the boot parameters passed from romcode.
+        * We cannot delay the saving further than this,
+        * to prevent overwrites.
+        */
+       save_omap_boot_params();
+#endif
+#ifdef CONFIG_DEBUG_UART_OMAP
+       debug_uart_init();
+#endif
 #ifdef CONFIG_TI_I2C_BOARD_DETECT
        do_board_detect();
 #endif
+#ifdef CONFIG_SPL_BUILD
+       spl_early_init();
+#endif
 #if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
        /* Enable RTC32K clock */
        rtc32k_enable();
@@ -310,9 +365,14 @@ void early_system_init(void)
 #ifdef CONFIG_SPL_BUILD
 void board_init_f(ulong dummy)
 {
+       hw_data_init();
        early_system_init();
        board_early_init_f();
        sdram_init();
+       /* dram_init must store complete ramsize in gd->ram_size */
+       gd->ram_size = get_ram_size(
+                       (void *)CONFIG_SYS_SDRAM_BASE,
+                       CONFIG_MAX_RAM_BANK_SIZE);
 }
 #endif
 
@@ -320,6 +380,7 @@ void board_init_f(ulong dummy)
 
 int arch_cpu_init_dm(void)
 {
+       hw_data_init();
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
        early_system_init();
 #endif