]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/mach-rockchip/rk3188-board-spl.c
rockchip: reserve memory for rk3399 ATF data
[u-boot] / arch / arm / mach-rockchip / rk3188-board-spl.c
index f93feae0c9bedc339ed9fdbbf261b42048047eb0..c3e174db9eae3b8a0f4651a413c8d12c47b64b0f 100644 (file)
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <clk.h>
 #include <common.h>
 #include <debug_uart.h>
 #include <dm.h>
@@ -76,6 +77,27 @@ u32 spl_boot_mode(const u32 boot_device)
        return MMCSD_MODE_RAW;
 }
 
+static int setup_arm_clock(void)
+{
+       struct udevice *dev;
+       struct clk clk;
+       int ret;
+
+       ret = rockchip_get_clk(&dev);
+       if (ret)
+               return ret;
+
+       clk.id = CLK_ARM;
+       ret = clk_request(dev, &clk);
+       if (ret < 0)
+               return ret;
+
+       ret = clk_set_rate(&clk, 600000000);
+
+       clk_free(&clk);
+       return ret;
+}
+
 void board_init_f(ulong dummy)
 {
        struct udevice *pinctrl, *dev;
@@ -109,9 +131,9 @@ void board_init_f(ulong dummy)
        printch('\n');
 #endif
 
-       ret = spl_init();
+       ret = spl_early_init();
        if (ret) {
-               debug("spl_init() failed: %d\n", ret);
+               debug("spl_early_init() failed: %d\n", ret);
                hang();
        }
 
@@ -144,6 +166,8 @@ void board_init_f(ulong dummy)
                return;
        }
 
+       setup_arm_clock();
+
 #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
        back_to_bootrom();
 #endif