common: Pass the boot device into spl_boot_mode()

[u-boot] / arch / arm / mach-socfpga / spl.c

diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index 82570f86174fd8b003158102cea0a0196aa4fead..fec4c7a991019725b4523c1d1b0099abc973d453 100644 (file)
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -40,6 +40,7 @@ u32 spl_boot_device(void)
                return BOOT_DEVICE_RAM;
        case 0x2:       /* NAND Flash (1.8V) */
        case 0x3:       /* NAND Flash (3.0V) */
+               socfpga_per_reset(SOCFPGA_RESET(NAND), 0);
                return BOOT_DEVICE_NAND;
        case 0x4:       /* SD/MMC External Transceiver (1.8V) */
        case 0x5:       /* SD/MMC Internal Transceiver (3.0V) */
@@ -57,7 +58,7 @@ u32 spl_boot_device(void)
 }
 
 #ifdef CONFIG_SPL_MMC_SUPPORT
-u32 spl_boot_mode(void)
+u32 spl_boot_mode(const u32 boot_device)
 {
 #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
        return MMCSD_MODE_FS;
@@ -178,5 +179,6 @@ void board_init_f(ulong dummy)
 
        socfpga_bridges_reset(1);
 
-       board_init_r(NULL, 0);
+       /* Configure simple malloc base pointer into RAM. */
+       gd->malloc_base = CONFIG_SYS_TEXT_BASE + (1024 * 1024);
 }