sunxi: Add SUN6I_P2WI kconfig entry

[u-boot] / arch / arm / mach-sunxi / Kconfig

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index bb57d4ff81230035cd8a11524c89b6f6ab475288..81573819e98e0506a40b8b89c4850f8dfbaac624 100644 (file)
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -6,6 +6,23 @@ config SPL_LDSCRIPT
 config IDENT_STRING
        default " Allwinner Technology"
 
+config SUN6I_P2WI
+       bool "Allwinner sun6i internal P2WI controller"
+       help
+         If you say yes to this option, support will be included for the
+         P2WI (Push/Pull 2 Wire Interface) controller embedded in some sunxi
+         SOCs.
+         The P2WI looks like an SMBus controller (which supports only byte
+         accesses), except that it only supports one slave device.
+         This interface is used to connect to specific PMIC devices (like the
+         AXP221).
+
+config SUN6I_PRCM
+       bool
+       help
+         Support for the PRCM (Power/Reset/Clock Management) unit available
+         in A31 SoC.
+
 config SUNXI_HIGH_SRAM
        bool
        default n
@@ -80,6 +97,7 @@ config MACH_SUN5I
        select ARM_CORTEX_CPU_IS_UP
        select SUNXI_GEN_SUN4I
        select SUPPORT_SPL
+       imply CONS_INDEX_2 if !DM_SERIAL
 
 config MACH_SUN6I
        bool "sun6i (Allwinner A31)"
@@ -87,6 +105,8 @@ config MACH_SUN6I
        select CPU_V7_HAS_NONSEC
        select CPU_V7_HAS_VIRT
        select ARCH_SUPPORT_PSCI
+       select SUN6I_P2WI
+       select SUN6I_PRCM
        select SUNXI_GEN_SUN6I
        select SUPPORT_SPL
        select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
@@ -110,6 +130,7 @@ config MACH_SUN8I_A23
        select SUNXI_GEN_SUN6I
        select SUPPORT_SPL
        select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+       imply CONS_INDEX_5 if !DM_SERIAL
 
 config MACH_SUN8I_A33
        bool "sun8i (Allwinner A33)"
@@ -120,6 +141,7 @@ config MACH_SUN8I_A33
        select SUNXI_GEN_SUN6I
        select SUPPORT_SPL
        select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+       imply CONS_INDEX_5 if !DM_SERIAL
 
 config MACH_SUN8I_A83T
        bool "sun8i (Allwinner A83T)"
@@ -397,9 +419,9 @@ config SYS_CLK_FREQ
        default 1008000000 if MACH_SUN5I
        default 1008000000 if MACH_SUN6I
        default 912000000 if MACH_SUN7I
+       default 816000000 if MACH_SUN50I || MACH_SUN50I_H5
        default 1008000000 if MACH_SUN8I
        default 1008000000 if MACH_SUN9I
-       default 816000000 if MACH_SUN50I
 
 config SYS_CONFIG_NAME
        default "sun4i" if MACH_SUN4I
@@ -682,7 +704,7 @@ config VIDEO_LCD_MODE
 
 config VIDEO_LCD_DCLK_PHASE
        int "LCD panel display clock phase"
-       depends on VIDEO_SUNXI
+       depends on VIDEO_SUNXI || DM_VIDEO
        default 1
        ---help---
        Select LCD panel display clock phase shift, range 0-3.
@@ -847,4 +869,12 @@ config SPL_STACK_R_ADDR
        default 0x2fe00000 if MACH_SUN9I
        default 0x4fe00000 if MACH_SUN50I
 
+config SPL_SPI_SUNXI
+       bool "Support for SPI Flash on Allwinner SoCs in SPL"
+       depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+       help
+         Enable support for SPI Flash. This option allows SPL to read from
+         sunxi SPI Flash. It uses the same method as the boot ROM, so does
+         not need any extra configuration.
+
 endif