]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/mach-tegra/board2.c
video: tegra: Enable the 'lcd' env variable work-around
[u-boot] / arch / arm / mach-tegra / board2.c
index 8ba143d996caed61ceb613383acf283d72838b6b..60e19c838784ec0fb2cb05e701c1314acaaee5bb 100644 (file)
@@ -34,8 +34,8 @@
 #ifdef CONFIG_TEGRA_CLOCK_SCALING
 #include <asm/arch/emc.h>
 #endif
-#ifdef CONFIG_USB_EHCI_TEGRA
 #include <asm/arch-tegra/usb.h>
+#ifdef CONFIG_USB_EHCI_TEGRA
 #include <usb.h>
 #endif
 #ifdef CONFIG_TEGRA_MMC
@@ -201,6 +201,14 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
 
 int board_early_init_f(void)
 {
+#if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT)
+#define USBCMD_FS2 (1 << 15)
+       {
+               struct usb_ctlr *usbctlr = (struct usb_ctlr *)0x7d000000;
+               writel(USBCMD_FS2, &usbctlr->usb_cmd);
+       }
+#endif
+
        /* Do any special system timer/TSC setup */
 #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
        if (!tegra_cpu_is_non_secure())
@@ -377,6 +385,10 @@ void dram_init_banksize(void)
        gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
        gd->bd->bi_dram[0].size = usable_ram_size_below_4g();
 
+#ifdef CONFIG_PCI
+       gd->pci_ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
+#endif
+
 #ifdef CONFIG_PHYS_64BIT
        if (gd->ram_size > SZ_2G) {
                gd->bd->bi_dram[1].start = 0x100000000;