SPDX: Convert all of our single license tags to Linux Kernel style

[u-boot] / arch / arm / mach-tegra / powergate.c

diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 439cff36b9515764e09d2b85e49cebd9e766d04a..d32d559f13ad62b594d367127709ccf8b1d5826a 100644 (file)
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0
  */
 
 #include <common.h>
@@ -9,7 +8,7 @@
 
 #include <asm/io.h>
 #include <asm/types.h>
-
+#include <asm/arch/flow.h>
 #include <asm/arch/powergate.h>
 #include <asm/arch/tegra.h>
 
@@ -44,7 +43,7 @@ static int tegra_powergate_set(enum tegra_powergate id, bool state)
        return -ETIMEDOUT;
 }
 
-static int tegra_powergate_power_on(enum tegra_powergate id)
+int tegra_powergate_power_on(enum tegra_powergate id)
 {
        return tegra_powergate_set(id, true);
 }
@@ -75,11 +74,29 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id)
        return 0;
 }
 
+static void tegra_powergate_ram_repair(void)
+{
+#ifdef CONFIG_TEGRA124
+       struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE;
+
+       /* Request RAM repair for cluster 0 and wait until complete */
+       setbits_le32(&flow->ram_repair, RAM_REPAIR_REQ);
+       while (!(readl(&flow->ram_repair) & RAM_REPAIR_STS))
+               ;
+
+       /* Same for cluster 1 */
+       setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ);
+       while (!(readl(&flow->ram_repair_cluster1) & RAM_REPAIR_STS))
+               ;
+#endif
+}
+
 int tegra_powergate_sequence_power_up(enum tegra_powergate id,
                                      enum periph_id periph)
 {
        int err;
 
+       tegra_powergate_ram_repair();
        reset_set_enable(periph, 1);
 
        err = tegra_powergate_power_on(id);