ARM: tegra: add APIs the clock uclass driver will need

[u-boot] / arch / arm / mach-tegra / psci.S

diff --git a/arch/arm/mach-tegra/psci.S b/arch/arm/mach-tegra/psci.S
index e4733e638351462a781a47209f40862dbd54aa62..645d08fa0bd84b7287e4137f8d2dd47a6bd99987 100644 (file)
--- a/arch/arm/mach-tegra/psci.S
+++ b/arch/arm/mach-tegra/psci.S
@@ -51,12 +51,22 @@ ENTRY(psci_arch_init)
        str     r5, [r4]
 
        bl      psci_get_cpu_id         @ CPU ID => r0
-       bl      psci_get_cpu_stack_top  @ stack top => r0
-       mov     sp, r0
+
+       adr     r5, _sys_clock_freq
+       cmp     r0, #0
+
+       mrceq   p15, 0, r7, c14, c0, 0  @ read CNTFRQ from CPU0
+       streq   r7, [r5]
+
+       ldrne   r7, [r5]
+       mcrne   p15, 0, r7, c14, c0, 0  @ write CNTFRQ to CPU1..3
 
        bx      r6
 ENDPROC(psci_arch_init)
 
+_sys_clock_freq:
+       .word   0
+
 ENTRY(psci_cpu_off)
        bl      psci_cpu_off_common
 
@@ -75,12 +85,13 @@ _loop:      wfi
 ENDPROC(psci_cpu_off)
 
 ENTRY(psci_cpu_on)
-       push    {lr}
+       push    {r4, r5, r6, lr}
 
+       mov     r4, r1
        mov     r0, r1
-       bl      psci_get_cpu_stack_top  @ get stack top of target CPU
-       str     r2, [r0]                @ store target PC at stack top
-       dsb
+       mov     r1, r2
+       bl      psci_save_target_pc     @ store target PC
+       mov     r1, r4
 
        ldr     r6, =TEGRA_RESET_EXCEPTION_VECTOR
        ldr     r5, =psci_cpu_entry
@@ -93,9 +104,7 @@ ENTRY(psci_cpu_on)
        str     r5, [r6, r2]
 
        mov     r0, #ARM_PSCI_RET_SUCCESS       @ Return PSCI_RET_SUCCESS
-       pop     {pc}
+       pop     {r4, r5, r6, pc}
 ENDPROC(psci_cpu_on)
 
-       .globl psci_text_end
-psci_text_end:
        .popsection