#include <common.h>
#include <errno.h>
-#include <fdtdec.h>
-#include <malloc.h>
+#include <dm/of_access.h>
+#include <dm/ofnode.h>
#include "../xusb-padctl-common.h"
-#include <asm/io.h>
-
-#include <asm/arch/clock.h>
-#include <asm/arch-tegra/xusb-padctl.h>
-
#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
#define XUSB_PADCTL_ELPG_PROGRAM 0x01c
u32 value;
if (padctl->enable == 0) {
- error("unbalanced enable/disable");
+ pr_err("unbalanced enable/disable");
return 0;
}
.unprepare = phy_unprepare,
};
-struct tegra_xusb_padctl *padctl = &(struct tegra_xusb_padctl) {
- .phys = {
- [0] = {
- .ops = &pcie_phy_ops,
- },
- [1] = {
- .ops = &sata_phy_ops,
- },
+static struct tegra_xusb_phy tegra124_phys[] = {
+ {
+ .type = TEGRA_XUSB_PADCTL_PCIE,
+ .ops = &pcie_phy_ops,
+ .padctl = &padctl,
+ },
+ {
+ .type = TEGRA_XUSB_PADCTL_SATA,
+ .ops = &sata_phy_ops,
+ .padctl = &padctl,
},
};
-int process_nodes(const void *fdt, int nodes[], unsigned int count)
-{
- unsigned int i;
-
- for (i = 0; i < count; i++) {
- enum fdt_compat_id id;
- int err;
-
- if (!fdtdec_get_is_enabled(fdt, nodes[i]))
- continue;
-
- id = fdtdec_lookup(fdt, nodes[i]);
- switch (id) {
- case COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL:
- break;
-
- default:
- error("unsupported compatible: %s",
- fdtdec_get_compatible(id));
- continue;
- }
-
- padctl->num_lanes = ARRAY_SIZE(tegra124_lanes);
- padctl->lanes = tegra124_lanes;
-
- padctl->num_functions = ARRAY_SIZE(tegra124_functions);
- padctl->functions = tegra124_functions;
-
- err = tegra_xusb_padctl_parse_dt(padctl, fdt, nodes[i]);
- if (err < 0) {
- error("failed to parse DT: %d", err);
- continue;
- }
-
- /* deassert XUSB padctl reset */
- reset_set_enable(PERIPH_ID_XUSB_PADCTL, 0);
+static const struct tegra_xusb_padctl_soc tegra124_socdata = {
+ .lanes = tegra124_lanes,
+ .num_lanes = ARRAY_SIZE(tegra124_lanes),
+ .functions = tegra124_functions,
+ .num_functions = ARRAY_SIZE(tegra124_functions),
+ .phys = tegra124_phys,
+ .num_phys = ARRAY_SIZE(tegra124_phys),
+};
- err = tegra_xusb_padctl_config_apply(padctl, &padctl->config);
- if (err < 0) {
- error("failed to apply pinmux: %d", err);
- continue;
+void tegra_xusb_padctl_init(void)
+{
+ ofnode nodes[1];
+ int count = 0;
+ int ret;
+
+ debug("%s: start\n", __func__);
+ if (of_live_active()) {
+ struct device_node *np = of_find_compatible_node(NULL, NULL,
+ "nvidia,tegra124-xusb-padctl");
+
+ debug("np=%p\n", np);
+ if (np) {
+ nodes[0] = np_to_ofnode(np);
+ count = 1;
}
-
- /* only a single instance is supported */
- break;
+ } else {
+ int node_offsets[1];
+ int i;
+
+ count = fdtdec_find_aliases_for_id(gd->fdt_blob, "padctl",
+ COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL,
+ node_offsets, ARRAY_SIZE(node_offsets));
+ for (i = 0; i < count; i++)
+ nodes[i] = offset_to_ofnode(node_offsets[i]);
}
- return 0;
-}
-
-void tegra_xusb_padctl_init(const void *fdt)
-{
- int count, nodes[1];
-
- count = fdtdec_find_aliases_for_id(fdt, "padctl",
- COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL,
- nodes, ARRAY_SIZE(nodes));
- if (process_nodes(fdt, nodes, count))
- return;
+ ret = tegra_xusb_process_nodes(nodes, count, &tegra124_socdata);
+ debug("%s: done, ret=%d\n", __func__, ret);
}