ARM: uniphier: compute SSCPLL values more precisely

[u-boot] / arch / arm / mach-uniphier / clk / pll.h

diff --git a/arch/arm/mach-uniphier/clk/pll.h b/arch/arm/mach-uniphier/clk/pll.h
index ef0f722d0a1c724000c0bd103abf2c7add3e19bd..5eefc4ee31159f174a8ec56e2c3447e2a7d1370c 100644 (file)
--- a/arch/arm/mach-uniphier/clk/pll.h
+++ b/arch/arm/mach-uniphier/clk/pll.h
@@ -8,6 +8,15 @@
 #ifndef MACH_PLL_H
 #define MACH_PLL_H
 
+#define UNIPHIER_PLL_FREQ_DEFAULT      (0)
+
 void uniphier_ld4_dpll_ssc_en(void);
 
+int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq,
+                             unsigned int ssc_rate, unsigned int divn);
+int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base);
+int uniphier_ld20_sscpll_set_regi(unsigned long reg_base, unsigned regi);
+int uniphier_ld20_vpll27_init(unsigned long reg_base);
+int uniphier_ld20_dspll_init(unsigned long reg_base);
+
 #endif /* MACH_PLL_H */