ARM: DRA7: Add macros for voltage values for all OPPs

[u-boot] / arch / arm / mach-uniphier / memconf / memconf.c

diff --git a/arch/arm/mach-uniphier/memconf/memconf.c b/arch/arm/mach-uniphier/memconf/memconf.c
index f2a0eaf3f52f64bd4117fc404c374f2e26d4f8e0..3d4b50456b65e254785f3becbe21847e08113708 100644 (file)
--- a/arch/arm/mach-uniphier/memconf/memconf.c
+++ b/arch/arm/mach-uniphier/memconf/memconf.c
@@ -21,14 +21,14 @@ int memconf_init(const struct uniphier_board_data *bd)
 
        tmp &= ~(SG_MEMCONF_CH0_SZ_MASK | SG_MEMCONF_CH0_NUM_MASK);
 
-       switch (bd->dram_ch0_width) {
+       switch (bd->dram_ch[0].width) {
        case 16:
                tmp |= SG_MEMCONF_CH0_NUM_1;
-               size_per_word = bd->dram_ch0_size;
+               size_per_word = bd->dram_ch[0].size;
                break;
        case 32:
                tmp |= SG_MEMCONF_CH0_NUM_2;
-               size_per_word = bd->dram_ch0_size >> 1;
+               size_per_word = bd->dram_ch[0].size >> 1;
                break;
        default:
                pr_err("error: unsupported DRAM Ch0 width\n");
@@ -59,14 +59,14 @@ int memconf_init(const struct uniphier_board_data *bd)
 
        tmp &= ~(SG_MEMCONF_CH1_SZ_MASK | SG_MEMCONF_CH1_NUM_MASK);
 
-       switch (bd->dram_ch1_width) {
+       switch (bd->dram_ch[1].width) {
        case 16:
                tmp |= SG_MEMCONF_CH1_NUM_1;
-               size_per_word = bd->dram_ch1_size;
+               size_per_word = bd->dram_ch[1].size;
                break;
        case 32:
                tmp |= SG_MEMCONF_CH1_NUM_2;
-               size_per_word = bd->dram_ch1_size >> 1;
+               size_per_word = bd->dram_ch[1].size >> 1;
                break;
        default:
                pr_err("error: unsupported DRAM Ch1 width\n");
@@ -94,7 +94,7 @@ int memconf_init(const struct uniphier_board_data *bd)
                return -EINVAL;
        }
 
-       if (bd->dram_ch0_base + bd->dram_ch0_size < bd->dram_ch1_base)
+       if (bd->dram_ch[0].base + bd->dram_ch[0].size < bd->dram_ch[1].base)
                tmp |= SG_MEMCONF_SPARSEMEM;
        else
                tmp &= ~SG_MEMCONF_SPARSEMEM;