#define SC_CLKCTRL (SC_BASE_ADDR | 0x2100)
#define SC_CLKCTRL3 (SC_BASE_ADDR | 0x2108)
#define SC_CLKCTRL4 (SC_BASE_ADDR | 0x210c)
+#define SC_CLKCTRL4_MIO (1 << 10)
+#define SC_CLKCTRL4_STDMAC (1 << 8)
#define SC_CLKCTRL4_PERI (1 << 7)
#define SC_CLKCTRL4_ETHER (1 << 6)
#define SC_CLKCTRL4_NAND (1 << 0)
#define SC_CLKCTRL7_UMC31 (1 << 1)
#define SC_CLKCTRL7_UMC30 (1 << 0)
-#define SC_CA72_GEARST (SC_BASE_ADDR | 0x8080)
-#define SC_CA72_GEARSET (SC_BASE_ADDR | 0x8084)
-#define SC_CA72_GEARUPD (SC_BASE_ADDR | 0x8088)
+#define SC_CA72_GEARST (SC_BASE_ADDR | 0x8000)
+#define SC_CA72_GEARSET (SC_BASE_ADDR | 0x8004)
+#define SC_CA72_GEARUPD (SC_BASE_ADDR | 0x8008)
#define SC_CA53_GEARST (SC_BASE_ADDR | 0x8080)
#define SC_CA53_GEARSET (SC_BASE_ADDR | 0x8084)
#define SC_CA53_GEARUPD (SC_BASE_ADDR | 0x8088)