sunxi: simplify ACTLR.SMP bit set #ifdef

[u-boot] / arch / arm / mach-zynq / slcr.c

diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
index 2d3bf2acef7e449ab73c4fcfc77878d19181079c..2a207ae46c18c918ca874d9e69d0a850c4de81ba 100644 (file)
--- a/arch/arm/mach-zynq/slcr.c
+++ b/arch/arm/mach-zynq/slcr.c
@@ -9,7 +9,6 @@
 #include <malloc.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/arch/clk.h>
 
 #define SLCR_LOCK_MAGIC                0x767B
 #define SLCR_UNLOCK_MAGIC      0xDF0D
@@ -124,34 +123,6 @@ void zynq_slcr_cpu_reset(void)
        writel(1, &slcr_base->pss_rst_ctrl);
 }
 
-/* Setup clk for network */
-void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)
-{
-       int ret;
-
-       zynq_slcr_unlock();
-
-       if (gem_id > 1) {
-               printf("Non existing GEM id %d\n", gem_id);
-               goto out;
-       }
-
-       ret = zynq_clk_set_rate(gem0_clk + gem_id, clk_rate);
-       if (ret)
-               goto out;
-
-       if (gem_id) {
-               /* Configure GEM_RCLK_CTRL */
-               writel(1, &slcr_base->gem1_rclk_ctrl);
-       } else {
-               /* Configure GEM_RCLK_CTRL */
-               writel(1, &slcr_base->gem0_rclk_ctrl);
-       }
-       udelay(100000);
-out:
-       zynq_slcr_lock();
-}
-
 void zynq_slcr_devcfg_disable(void)
 {
        u32 reg_val;