nios2: set default cache configuration in start.S

[u-boot] / arch / m68k / cpu / mcf532x / cpu_init.c

diff --git a/arch/m68k/cpu/mcf532x/cpu_init.c b/arch/m68k/cpu/mcf532x/cpu_init.c
index f571fadc35aaf6065fc0f82a25fc09f3c3f61ab5..8d01f5fcf0d62b7cfbab5b33af87bbf8b9a28a3f 100644 (file)
--- a/arch/m68k/cpu/mcf532x/cpu_init.c
+++ b/arch/m68k/cpu/mcf532x/cpu_init.c
@@ -6,23 +6,7 @@
  * (C) Copyright 2004-2008, 2012 Freescale Semiconductor, Inc.
  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -98,7 +82,7 @@ void cpu_init_f(void)
        out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK);
 #endif
 
-#ifdef CONFIG_FSL_I2C
+#ifdef CONFIG_SYS_I2C_FSL
        out_8(&gpio->par_feci2c,
                GPIO_PAR_FECI2C_SDA_SDA | GPIO_PAR_FECI2C_SCL_SCL);
 #endif
@@ -224,10 +208,10 @@ void cpu_init_f(void)
        scm2_t *scm2 = (scm2_t *) MMAP_SCM2;
        gpio_t *gpio = (gpio_t *) MMAP_GPIO;
        fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
+#ifndef CONFIG_WATCHDOG
        wdog_t *wdog = (wdog_t *) MMAP_WDOG;
 
        /* watchdog is enabled by default - disable the watchdog */
-#ifndef CONFIG_WATCHDOG
        out_be16(&wdog->cr, 0);
 #endif
 
@@ -292,7 +276,7 @@ void cpu_init_f(void)
        out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK);
 #endif
 
-#ifdef CONFIG_FSL_I2C
+#ifdef CONFIG_SYS_I2C_FSL
        out_8(&gpio->par_feci2c,
                GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA);
 #endif