* (C) Copyright 2000-2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
- * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/processor.h>
#include <asm/immap.h>
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
/* Get the value of the current system clock */
int get_sys_clock(void)
{
- volatile ccm_t *ccm = (volatile ccm_t *)(MMAP_CCM);
- volatile pll_t *pll = (volatile pll_t *)(MMAP_PLL);
+ ccm_t *ccm = (ccm_t *)(MMAP_CCM);
+ pll_t *pll = (pll_t *)(MMAP_PLL);
int divider;
/* Test to see if device is in LIMP mode */
- if (ccm->misccr & CCM_MISCCR_LIMP) {
- divider = ccm->cdr & CCM_CDR_LPDIV(0xF);
+ if (in_be16(&ccm->misccr) & CCM_MISCCR_LIMP) {
+ divider = in_be16(&ccm->cdr) & CCM_CDR_LPDIV(0xF);
#ifdef CONFIG_MCF5301x
return (FREF / (3 * (1 << divider)));
#endif
#endif
} else {
#ifdef CONFIG_MCF5301x
- u32 pfdr = (pll->pcr & 0x3F) + 1;
- u32 refdiv = (1 << ((pll->pcr & PLL_PCR_REFDIV(7)) >> 8));
- u32 busdiv = ((pll->pdr & 0x00F0) >> 4) + 1;
+ u32 pfdr = (in_be32(&pll->pcr) & 0x3F) + 1;
+ u32 refdiv = (1 << ((in_be32(&pll->pcr) & PLL_PCR_REFDIV(7)) >> 8));
+ u32 busdiv = ((in_be32(&pll->pdr) & 0x00F0) >> 4) + 1;
return (((FREF * pfdr) / refdiv) / busdiv);
#endif
#ifdef CONFIG_MCF532x
- return ((FREF * pll->pfdr) / (BUSDIV * 4));
+ return (FREF * in_8(&pll->pfdr)) / (BUSDIV * 4);
#endif
}
}
*/
int clock_limp(int div)
{
- volatile ccm_t *ccm = (volatile ccm_t *)(MMAP_CCM);
+ ccm_t *ccm = (ccm_t *)(MMAP_CCM);
u32 temp;
/* Check bounds of divider */
div = MAX_LPD;
/* Save of the current value of the SSIDIV so we don't overwrite the value */
- temp = (ccm->cdr & CCM_CDR_SSIDIV(0xFF));
+ temp = (in_be16(&ccm->cdr) & CCM_CDR_SSIDIV(0xFF));
/* Apply the divider to the system clock */
- ccm->cdr = (CCM_CDR_LPDIV(div) | CCM_CDR_SSIDIV(temp));
+ out_be16(&ccm->cdr, CCM_CDR_LPDIV(div) | CCM_CDR_SSIDIV(temp));
- ccm->misccr |= CCM_MISCCR_LIMP;
+ setbits_be16(&ccm->misccr, CCM_MISCCR_LIMP);
return (FREF / (3 * (1 << div)));
}
/* Exit low power LIMP mode */
int clock_exit_limp(void)
{
- volatile ccm_t *ccm = (volatile ccm_t *)(MMAP_CCM);
+ ccm_t *ccm = (ccm_t *)(MMAP_CCM);
int fout;
/* Exit LIMP mode */
- ccm->misccr &= (~CCM_MISCCR_LIMP);
+ clrbits_be16(&ccm->misccr, CCM_MISCCR_LIMP);
/* Wait for PLL to lock */
- while (!(ccm->misccr & CCM_MISCCR_PLL_LOCK)) ;
+ while (!(in_be16(&ccm->misccr) & CCM_MISCCR_PLL_LOCK))
+ ;
fout = get_sys_clock();
int clock_pll(int fsys, int flags)
{
#ifdef CONFIG_MCF532x
- volatile u32 *sdram_workaround = (volatile u32 *)(MMAP_SDRAM + 0x80);
+ u32 *sdram_workaround = (u32 *)(MMAP_SDRAM + 0x80);
#endif
- volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM);
- volatile pll_t *pll = (volatile pll_t *)(MMAP_PLL);
+ sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
+ pll_t *pll = (pll_t *)(MMAP_PLL);
int fref, temp, fout, mfd;
u32 i;
if (fsys == 0) {
/* Return current PLL output */
#ifdef CONFIG_MCF5301x
- u32 busdiv = ((pll->pdr >> 4) & 0x0F) + 1;
- mfd = (pll->pcr & 0x3F) + 1;
+ u32 busdiv = ((in_be32(&pll->pdr) >> 4) & 0x0F) + 1;
+ mfd = (in_be32(&pll->pcr) & 0x3F) + 1;
return (fref * mfd) / busdiv;
#endif
#ifdef CONFIG_MCF532x
- mfd = pll->pfdr;
+ mfd = in_8(&pll->pfdr);
return (fref * mfd / (BUSDIV * 4));
#endif
* If it has then the SDRAM needs to be put into self refresh
* mode before reprogramming the PLL.
*/
- if (sdram->ctrl & SDRAMC_SDCR_REF)
- sdram->ctrl &= ~SDRAMC_SDCR_CKE;
+ if (in_be32(&sdram->ctrl) & SDRAMC_SDCR_REF)
+ clrbits_be32(&sdram->ctrl, SDRAMC_SDCR_CKE);
/*
* Initialize the PLL to generate the new system clock frequency.
clock_limp(DEFAULT_LPD);
#ifdef CONFIG_MCF5301x
- pll->pdr =
- PLL_PDR_OUTDIV1((BUSDIV / 3) - 1) |
- PLL_PDR_OUTDIV2(BUSDIV - 1) |
- PLL_PDR_OUTDIV3((BUSDIV / 2) - 1) |
- PLL_PDR_OUTDIV4(USBDIV - 1);
-
- pll->pcr &= PLL_PCR_FBDIV_UNMASK;
- pll->pcr |= PLL_PCR_FBDIV(mfd - 1);
+ out_be32(&pll->pdr,
+ PLL_PDR_OUTDIV1((BUSDIV / 3) - 1) |
+ PLL_PDR_OUTDIV2(BUSDIV - 1) |
+ PLL_PDR_OUTDIV3((BUSDIV / 2) - 1) |
+ PLL_PDR_OUTDIV4(USBDIV - 1));
+
+ clrbits_be32(&pll->pcr, ~PLL_PCR_FBDIV_UNMASK);
+ setbits_be32(&pll->pcr, PLL_PCR_FBDIV(mfd - 1));
#endif
#ifdef CONFIG_MCF532x
/* Reprogram PLL for desired fsys */
- pll->podr = (PLL_PODR_CPUDIV(BUSDIV / 3) | PLL_PODR_BUSDIV(BUSDIV));
+ out_8(&pll->podr,
+ PLL_PODR_CPUDIV(BUSDIV / 3) | PLL_PODR_BUSDIV(BUSDIV));
- pll->pfdr = mfd;
+ out_8(&pll->pfdr, mfd);
#endif
/* Exit LIMP mode */
clock_exit_limp();
/* Return the SDRAM to normal operation if it is in use. */
- if (sdram->ctrl & SDRAMC_SDCR_REF)
- sdram->ctrl |= SDRAMC_SDCR_CKE;
+ if (in_be32(&sdram->ctrl) & SDRAMC_SDCR_REF)
+ setbits_be32(&sdram->ctrl, SDRAMC_SDCR_CKE);
#ifdef CONFIG_MCF532x
/*
* software workaround for SDRAM opeartion after exiting LIMP
* mode errata
*/
- *sdram_workaround = CONFIG_SYS_SDRAM_BASE;
+ out_be32(sdram_workaround, CONFIG_SYS_SDRAM_BASE);
#endif
/* wait for DQS logic to relock */
gd->bus_clk = clock_pll(CONFIG_SYS_CLK / 1000, 0) * 1000;
gd->cpu_clk = (gd->bus_clk * 3);
-#ifdef CONFIG_FSL_I2C
- gd->i2c1_clk = gd->bus_clk;
+#ifdef CONFIG_SYS_I2C_FSL
+ gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);
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