+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* IO header file
*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
#ifndef __ASM_M68K_IO_H__
#define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
#define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
#else
-#define readw(addr) in_le16((volatile u16 *)(addr))
-#define readl(addr) in_le32((volatile u32 *)(addr))
-#define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
-#define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
+#define readw(addr) in_be16((volatile u16 *)(addr))
+#define readl(addr) in_be32((volatile u32 *)(addr))
+#define writew(b,addr) out_be16((volatile u16 *)(addr),(b))
+#define writel(b,addr) out_be32((volatile u32 *)(addr),(b))
#endif
/*
#define mb() __asm__ __volatile__ ("" : : : "memory")
-extern inline void _insb(volatile u8 * port, void *buf, int ns)
+static inline void _insb(volatile u8 * port, void *buf, int ns)
{
u8 *data = (u8 *) buf;
while (ns--)
*data++ = *port;
}
-extern inline void _outsb(volatile u8 * port, const void *buf, int ns)
+static inline void _outsb(volatile u8 * port, const void *buf, int ns)
{
u8 *data = (u8 *) buf;
while (ns--)
*port = *data++;
}
-extern inline void _insw(volatile u16 * port, void *buf, int ns)
+static inline void _insw(volatile u16 * port, void *buf, int ns)
{
u16 *data = (u16 *) buf;
while (ns--)
*data++ = __sw16(*port);
}
-extern inline void _outsw(volatile u16 * port, const void *buf, int ns)
+static inline void _outsw(volatile u16 * port, const void *buf, int ns)
{
u16 *data = (u16 *) buf;
while (ns--) {
}
}
-extern inline void _insl(volatile u32 * port, void *buf, int nl)
+static inline void _insl(volatile u32 * port, void *buf, int nl)
{
u32 *data = (u32 *) buf;
while (nl--)
*data++ = __sw32(*port);
}
-extern inline void _outsl(volatile u32 * port, const void *buf, int nl)
+static inline void _outsl(volatile u32 * port, const void *buf, int nl)
{
u32 *data = (u32 *) buf;
while (nl--) {
}
}
-extern inline void _insw_ns(volatile u16 * port, void *buf, int ns)
+static inline void _insw_ns(volatile u16 * port, void *buf, int ns)
{
u16 *data = (u16 *) buf;
while (ns--)
*data++ = *port;
}
-extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
+static inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
{
u16 *data = (u16 *) buf;
while (ns--) {
}
}
-extern inline void _insl_ns(volatile u32 * port, void *buf, int nl)
+static inline void _insl_ns(volatile u32 * port, void *buf, int nl)
{
u32 *data = (u32 *) buf;
while (nl--)
*data++ = *port;
}
-extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
+static inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
{
u32 *data = (u32 *) buf;
while (nl--) {
/*
* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
*/
-extern inline int in_8(volatile u8 * addr)
+static inline int in_8(volatile u8 * addr)
{
return (int)*addr;
}
-extern inline void out_8(volatile u8 * addr, int val)
+static inline void out_8(volatile u8 * addr, int val)
{
*addr = (u8) val;
}
-extern inline int in_le16(volatile u16 * addr)
+static inline int in_le16(volatile u16 * addr)
{
return __sw16(*addr);
}
-extern inline int in_be16(volatile u16 * addr)
+static inline int in_be16(volatile u16 * addr)
{
return (*addr & 0xFFFF);
}
-extern inline void out_le16(volatile u16 * addr, int val)
+static inline void out_le16(volatile u16 * addr, int val)
{
*addr = __sw16(val);
}
-extern inline void out_be16(volatile u16 * addr, int val)
+static inline void out_be16(volatile u16 * addr, int val)
{
*addr = (u16) val;
}
-extern inline unsigned in_le32(volatile u32 * addr)
+static inline unsigned in_le32(volatile u32 * addr)
{
return __sw32(*addr);
}
-extern inline unsigned in_be32(volatile u32 * addr)
+static inline unsigned in_be32(volatile u32 * addr)
{
return (*addr);
}
-extern inline void out_le32(volatile unsigned *addr, int val)
+static inline void out_le32(volatile unsigned *addr, int val)
{
*addr = __sw32(val);
}
-extern inline void out_be32(volatile unsigned *addr, int val)
+static inline void out_be32(volatile unsigned *addr, int val)
{
*addr = val;
}
+/* Clear and set bits in one shot. These macros can be used to clear and
+ * set multiple bits in a register using a single call. These macros can
+ * also be used to set a multiple-bit bit pattern using a mask, by
+ * specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+
+#define clrbits(type, addr, clear) \
+ out_##type((addr), in_##type(addr) & ~(clear))
+
+#define setbits(type, addr, set) \
+ out_##type((addr), in_##type(addr) | (set))
+
+#define clrsetbits(type, addr, clear, set) \
+ out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
+
+#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
+#define setbits_be32(addr, set) setbits(be32, addr, set)
+#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+
+#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
+#define setbits_le32(addr, set) setbits(le32, addr, set)
+#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
+
+#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
+#define setbits_be16(addr, set) setbits(be16, addr, set)
+#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+
+#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
+#define setbits_le16(addr, set) setbits(le16, addr, set)
+#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
+
+#define clrbits_8(addr, clear) clrbits(8, addr, clear)
+#define setbits_8(addr, set) setbits(8, addr, set)
+#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+
static inline void sync(void)
{
/* This sync function is for PowerPC or other architecture instruction
*/
}
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE (0)
-#define MAP_WRCOMBINE (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH (0)
-
-static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
- unsigned long flags)
-{
- return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
- return (phys_addr_t)(vaddr);
-}
+#include <asm-generic/io.h>
#endif /* __ASM_M68K_IO_H__ */
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