bootstage: Replace show_boot_progress/error() with bootstage_...()

[u-boot] / arch / microblaze / cpu / start.S

diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 17c0e287b1b3a24c01a821e3128bf029f6174781..9077f742ce20ca47f9cf7099ede8b15fba99d609 100644 (file)
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -51,8 +51,10 @@ _start:
         * 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3
         */
        addik   r6, r0, 0x2 /* BIG/LITTLE endian offset */
-       swi     r6, r0, 0
-       lbui    r10, r0, 0
+       lwi     r7, r0, 0x28
+       swi     r6, r0, 0x28 /* used first unused MB vector */
+       lbui    r10, r0, 0x28 /* used first unused MB vector */
+       swi     r7, r0, 0x28
 
        /* add opcode instruction for 32bit jump - 2 instruction imm & brai */
        addi    r2, r0, 0xb0000000      /* hex b000 opcode imm */
@@ -65,26 +67,11 @@ _start:
 
        addik   r6, r0, CONFIG_SYS_RESET_ADDRESS
        sw      r6, r1, r0
-       lhu     r7, r1, r0
-       shi     r7, r0, 0x2
-       shi     r6, r0, 0x6
-/*
- * Copy U-Boot code to CONFIG_SYS_TEXT_BASE
- * solve problem with sbrk_base
- */
-#if (CONFIG_SYS_RESET_ADDRESS != CONFIG_SYS_TEXT_BASE)
-       addi    r4, r0, __end
-       addi    r5, r0, __text_start
-       rsub    r4, r5, r4      /* size = __end - __text_start */
-       addi    r6, r0, CONFIG_SYS_RESET_ADDRESS        /* source address */
-       addi    r7, r0, 0       /* counter */
-4:
-       lw      r8, r6, r7
-       sw      r8, r5, r7
-       addi    r7, r7, 0x4
-       cmp     r8, r4, r7
-       blti    r8, 4b
-#endif
+       lhu     r7, r1, r10
+       rsubi   r8, r10, 0x2
+       sh      r7, r0, r8
+       rsubi   r8, r10, 0x6
+       sh      r6, r0, r8
 #endif
 
 #ifdef CONFIG_SYS_USR_EXCEP