*
* Copyright (c) 2003 Wolfgang Denk <wd@denx.de>
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
#endif
+#ifndef CONFIG_SYS_INIT_SP_ADDR
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
+ CONFIG_SYS_INIT_SP_OFFSET)
+#endif
+
/*
* For the moment disable interrupts, mark the kernel mode and
* set ST0_KX so that the CPU does not spit fire when using
nop
.org 0x10
-#ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
+#if defined(CONFIG_SYS_XWAY_EBU_BOOTCFG)
/*
* Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to
* access external NOR flashes. If the board boots from NOR flash the
*/
.word CONFIG_SYS_XWAY_EBU_BOOTCFG
.word 0x0
+#elif defined(CONFIG_MALTA)
+ /*
+ * Linux expects the Board ID here.
+ */
+ .word 0x00000420 # 0x420 (Malta Board with CoreLV)
+ .word 0x00000000
#endif
.org 0x200
#endif
/* Set up temporary stack */
- li sp, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
+ li t0, -16
+ li t1, CONFIG_SYS_INIT_SP_ADDR
+ and sp, t1, t0 # force 16 byte alignment
+ sub sp, sp, GD_SIZE # reserve space for gd
+ and sp, sp, t0 # force 16 byte alignment
+ move k0, sp # save gd pointer
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ li t2, CONFIG_SYS_MALLOC_F_LEN
+ sub sp, sp, t2 # reserve space for early malloc
+ and sp, sp, t0 # force 16 byte alignment
+#endif
+ move fp, sp
+
+ /* Clear gd */
+ move t0, k0
+1:
+ sw zero, 0(t0)
+ blt t0, t1, 1b
+ addi t0, 4
+
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ addu t0, k0, GD_MALLOC_BASE # gd->malloc_base offset
+ sw sp, 0(t0)
+#endif
la t9, board_init_f
jr t9
- nop
+ move ra, zero
/*
* void relocate_code (addr_sp, gd, addr_moni)
.ent relocate_code
relocate_code:
move sp, a0 # set new stack pointer
+ move fp, sp
move s0, a1 # save gd in s0
move s2, a2 # save destination address in s2
sub s1, s2, t0 # s1 <-- relocation offset
la t3, in_ram
- lw t2, -12(t3) # t2 <-- uboot_end_data
+ lw t2, -12(t3) # t2 <-- __image_copy_end
move t1, a2
add gp, s1 # adjust gp
jr t0
nop
+ .word __rel_dyn_end
+ .word __rel_dyn_start
+ .word __image_copy_end
.word _GLOBAL_OFFSET_TABLE_
- .word uboot_end_data
- .word uboot_end
.word num_got_entries
in_ram:
* generated by GNU ld. Skip these reserved entries from relocation.
*/
lw t3, -4(t0) # t3 <-- num_got_entries
- lw t4, -16(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
- add t4, s1 # t4 now holds relocated _G_O_T_
- addi t4, t4, 8 # skipping first two entries
+ lw t8, -8(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_
+ add t8, s1 # t8 now holds relocated _G_O_T_
+ addi t8, t8, 8 # skipping first two entries
li t2, 2
1:
- lw t1, 0(t4)
+ lw t1, 0(t8)
beqz t1, 2f
add t1, s1
- sw t1, 0(t4)
+ sw t1, 0(t8)
2:
addi t2, 1
blt t2, t3, 1b
- addi t4, 4
+ addi t8, 4
+
+ /* Update dynamic relocations */
+ lw t1, -16(t0) # t1 <-- __rel_dyn_start
+ lw t2, -20(t0) # t2 <-- __rel_dyn_end
+
+ b 2f # skip first reserved entry
+ addi t1, 8
+
+1:
+ lw t8, -4(t1) # t8 <-- relocation info
+
+ li t3, 3
+ bne t8, t3, 2f # skip non R_MIPS_REL32 entries
+ nop
+
+ lw t3, -8(t1) # t3 <-- location to fix up in FLASH
+
+ lw t8, 0(t3) # t8 <-- original pointer
+ add t8, s1 # t8 <-- adjusted pointer
+
+ add t3, s1 # t3 <-- location to fix up in RAM
+ sw t8, 0(t3)
+
+2:
+ blt t1, t2, 1b
+ addi t1, 8 # each rel.dyn entry is 8 bytes
/*
* Clear BSS
addi t1, 4
move a0, s0 # a0 <-- gd
+ move a1, s2
la t9, board_init_r
jr t9
- move a1, s2
+ move ra, zero
.end relocate_code
projects / u-boot / blobdiff