SPDX: Convert all of our single license tags to Linux Kernel style

[u-boot] / arch / mips / include / asm / system.h

diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h
index 7a2895284ed0d519d92ad0a82d0beef91a7d9537..79e638844b21e04a87e451a4fa36462afc5b18de 100644 (file)
--- a/arch/mips/include/asm/system.h
+++ b/arch/mips/include/asm/system.h
@@ -1,8 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
  * Copyright (C) 1994 - 1999 by Ralf Baechle
  * Copyright (C) 1996 by Paul M. Antoine
  * Copyright (C) 1994 - 1999 by Ralf Baechle
@@ -16,13 +13,15 @@
 #ifndef _ASM_SYSTEM_H
 #define _ASM_SYSTEM_H
 
+#include <asm/asm.h>
 #include <asm/sgidefs.h>
 #include <asm/ptrace.h>
+#include <linux/stringify.h>
 #if 0
 #include <linux/kernel.h>
 #endif
 
-extern __inline__ void
+static __inline__ void
 __sti(void)
 {
        __asm__ __volatile__(
@@ -46,7 +45,7 @@ __sti(void)
  * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
  * no nops at all.
  */
-extern __inline__ void
+static __inline__ void
 __cli(void)
 {
        __asm__ __volatile__(
@@ -207,7 +206,7 @@ do { \
  * For 32 and 64 bit operands we can take advantage of ll and sc.
  * FIXME: This doesn't work for R3000 machines.
  */
-extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
+static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
 {
 #ifdef CONFIG_CPU_HAS_LLSC
        unsigned long dummy;
@@ -264,4 +263,23 @@ extern void __die_if_kernel(const char *, struct pt_regs *, const char *where,
 #define die_if_kernel(msg, regs)                                       \
        __die_if_kernel(msg, regs, __FILE__ ":"__FUNCTION__, __LINE__)
 
+static inline void execution_hazard_barrier(void)
+{
+       __asm__ __volatile__(
+               ".set noreorder\n"
+               "ehb\n"
+               ".set reorder");
+}
+
+static inline void instruction_hazard_barrier(void)
+{
+       unsigned long tmp;
+
+       asm volatile(
+       __stringify(PTR_LA) "\t%0, 1f\n"
+       "       jr.hb   %0\n"
+       "1:     .insn"
+       : "=&r"(tmp));
+}
+
 #endif /* _ASM_SYSTEM_H */