nds32: ftmac100 support cache enable.

[u-boot] / arch / nds32 / include / asm / macro.h

diff --git a/arch/nds32/include/asm/macro.h b/arch/nds32/include/asm/macro.h
index f5c853991a62472c497fff700a559a91accbc80c..66be2580522d14265d20d8f28a4338ea23a00951 100644 (file)
--- a/arch/nds32/include/asm/macro.h
+++ b/arch/nds32/include/asm/macro.h
@@ -23,20 +23,20 @@
  */
 
 .macro write32, addr, data
-       li      $r4, addr
-       li      $r5, data
+       li      $r4, \addr
+       li      $r5, \data
        swi     $r5, [$r4]
 .endm
 
 .macro write16, addr, data
-       li      $r4, addr
-       li      $r5, data
+       li      $r4, \addr
+       li      $r5, \data
        shi     $r5, [$r4]
 .endm
 
 .macro write8, addr, data
-       li      $r4, addr
-       li      $r5, data
+       li      $r4, \addr
+       li      $r5, \data
        sbi     $r5, [$r4]
 .endm
 
@@ -46,17 +46,17 @@
  * Note: Instruction 'ori' supports immediate value up to 15 bits.
  */
 .macro setbf32, addr, data
-       li      $r4, addr
+       li      $r4, \addr
        lwi     $r5, [$r4]
-       li      $r6, data
+       li      $r6, \data
        or      $r5, $r5, $r6
        swi     $r5, [$r4]
 .endm
 
 .macro setbf15, addr, data
-       li      $r4, addr
+       li      $r4, \addr
        lwi     $r5, [$r4]
-       ori     $r5, $r5, data
+       ori     $r5, $r5, \data
        swi     $r5, [$r4]
 .endm
 
@@ -69,7 +69,7 @@
  */
 
 .macro wait_timer, time
-       li      $r4, time
+       li      $r4, \time
 1:
        nop
        addi    $r4, $r4, -1