Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

[u-boot] / arch / powerpc / cpu / mpc512x / fixed_sdram.c

diff --git a/arch/powerpc/cpu/mpc512x/fixed_sdram.c b/arch/powerpc/cpu/mpc512x/fixed_sdram.c
index 442b5fc918009ddd9e310dfe5ced34bbec31ec9b..6635fb036e8aa9c6d8d6f3107f7241bb8275413d 100644 (file)
--- a/arch/powerpc/cpu/mpc512x/fixed_sdram.c
+++ b/arch/powerpc/cpu/mpc512x/fixed_sdram.c
@@ -78,7 +78,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
                        u32 *dram_init_seq, int seq_sz)
 {
        volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-       u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
+       u32 msize = CONFIG_SYS_MAX_RAM_SIZE;
        u32 msize_log2 = __ilog2(msize);
        u32 i;
 
@@ -91,7 +91,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
        }
 
        /* Initialize IO Control */
-       out_be32(&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR);
+       out_be32(&im->io_ctrl.io_control_mem, CONFIG_SYS_IOCTRL_MUX_DDR);
 
        /* Initialize DDR Local Window */
        out_be32(&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000);
@@ -99,7 +99,19 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
        sync_law(&im->sysconf.ddrlaw.ar);
 
        /* DDR Enable */
-       out_be32(&im->mddrc.ddr_sys_config, MDDRC_SYS_CFG_EN);
+       /*
+        * the "enable" combination: DRAM controller out of reset,
+        * clock enabled, command mode -- BUT leave CKE low for now
+        */
+       i = MDDRC_SYS_CFG_EN & ~MDDRC_SYS_CFG_CKE_MASK;
+       out_be32(&im->mddrc.ddr_sys_config, i);
+       /* maintain 200 microseconds of stable power and clock */
+       udelay(200);
+       /* apply a NOP, it shouldn't harm */
+       out_be32(&im->mddrc.ddr_command, CONFIG_SYS_DDRCMD_NOP);
+       /* now assert CKE (high) */
+       i |= MDDRC_SYS_CFG_CKE_MASK;
+       out_be32(&im->mddrc.ddr_sys_config, i);
 
        /* Initialize DDR Priority Manager */
        out_be32(&im->mddrc.prioman_config1, CONFIG_SYS_MDDRCGRP_PM_CFG1);
@@ -148,5 +160,13 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
        out_be32(&im->mddrc.ddr_time_config0, mddrc_config->ddr_time_config0);
        out_be32(&im->mddrc.ddr_sys_config, mddrc_config->ddr_sys_config);
 
+       /* Allow for the DLL to startup before accessing data */
+       udelay(10);
+
+       msize = get_ram_size(CONFIG_SYS_DDR_BASE, CONFIG_SYS_MAX_RAM_SIZE);
+       /* Fix DDR Local Window for new size */
+       out_be32(&im->sysconf.ddrlaw.ar, __ilog2(msize) - 1);
+       sync_law(&im->sysconf.ddrlaw.ar);
+
        return msize;
 }