Merge git://git.denx.de/u-boot-mpc85xx

[u-boot] / arch / powerpc / cpu / mpc83xx / pci.c

diff --git a/arch/powerpc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c
index a42b230ff35e62db43727e437a6f97bd7f30771c..30606fbe5827b66859259c53037d2cfe13e73607 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/pci.c
+++ b/arch/powerpc/cpu/mpc83xx/pci.c
@@ -4,23 +4,7 @@
  * Author: Scott Wood <scottwood@freescale.com>,
  * with some bits from older board-specific PCI initialization.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -83,7 +67,7 @@ static void pci_init_bus(int bus, struct pci_region *reg)
        pci_ctrl->pibar1 = 0;
        pci_ctrl->piebar1 = 0;
        pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
-                          PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size - 1));
+                          PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size - 1));
 
        i = hose->region_count++;
        hose->regions[i].bus_start = 0;
@@ -95,7 +79,7 @@ static void pci_init_bus(int bus, struct pci_region *reg)
        hose->last_busno = 0xff;
 
        pci_setup_indirect(hose, CONFIG_SYS_IMMR + 0x8300 + bus * 0x80,
-                                CONFIG_SYS_IMMR + 0x8304 + bus * 0x80);
+                                CONFIG_SYS_IMMR + 0x8304 + bus * 0x80);
 
        pci_register_hose(hose);
 
@@ -133,7 +117,7 @@ static void pci_init_bus(int bus, struct pci_region *reg)
  * If fewer than three regions are requested, then the region
  * list is terminated with a region of size 0.
  */
-void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot)
+void mpc83xx_pci_init(int num_buses, struct pci_region **reg)
 {
        volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
        int i;
@@ -150,9 +134,9 @@ void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot)
        /*
         * Release PCI RST Output signal.
         * Power on to RST high must be at least 100 ms as per PCI spec.
-        * On warm boots only 1 ms is required.
+        * On warm boots only 1 ms is required, but we play it safe.
         */
-       udelay(warmboot ? 1000 : 100000);
+       udelay(100000);
 
        for (i = 0; i < num_buses; i++)
                immr->pci_ctrl[i].gcr = 1;