#include <asm-offsets.h>
#include <config.h>
#include <mpc83xx.h>
-#include <timestamp.h>
+#ifndef CONFIG_IDENT_STRING
+#define CONFIG_IDENT_STRING "MPC83XX"
+#endif
#include <version.h>
#define CONFIG_83XX 1 /* needed for Linux kernel header files*/
#include <asm/mmu.h>
#include <asm/u-boot.h>
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING "MPC83XX"
-#endif
-
/* We don't want the MMU yet.
*/
#undef MSR_KERNEL
START_GOT
GOT_ENTRY(_GOT2_TABLE_)
GOT_ENTRY(__bss_start)
- GOT_ENTRY(_end)
+ GOT_ENTRY(__bss_end__)
#ifndef CONFIG_NAND_SPL
GOT_ENTRY(_FIXUP_TABLE_)
.globl version_string
version_string:
- .ascii U_BOOT_VERSION
- .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
- .ascii " ", CONFIG_IDENT_STRING, "\0"
+ .ascii U_BOOT_VERSION_STRING, "\0"
.align 2
*/
lwz r4,GOT(environment)
#else
- lwz r4,GOT(_end)
+ lwz r4,GOT(__bss_end__)
#endif
cmplw 0, r3, r4
bne 1b
stw r4, LBLAWAR1(r3) /* LBLAWAR1 <= 8MB Flash Size */
+ /* Wait for HW to catch up */
+ lwz r4, LBLAWAR1(r3)
+ twi 0,r4,0
+ isync
blr
/* Though all the LBIU Local Access Windows and LBC Banks will be
xor r4, r4, r4
stw r4, LBLAWBAR1(r3)
stw r4, LBLAWAR1(r3) /* Off LBIU LAW1 */
+ /* Wait for HW to catch up */
+ lwz r4, LBLAWAR1(r3)
+ twi 0,r4,0
+ isync
blr
#endif /* CONFIG_SYS_FLASHBOOT */