powerpc: B4860: Remove macro CONFIG_PPC_B4860

[u-boot] / arch / powerpc / cpu / mpc85xx / b4860_serdes.c

diff --git a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
index cf18be552864eb011c28d53630c6c2425e11ac35..64db7a7d3ab7b8f79523370b3e1577eeaf0a94c6 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
@@ -15,9 +15,11 @@ struct serdes_config {
        u8 lanes[SRDS_MAX_LANES];
 };
 
-#ifdef CONFIG_PPC_B4860
+#ifdef CONFIG_ARCH_B4860
 static struct serdes_config serdes1_cfg_tbl[] = {
        /* SerDes 1 */
+       {0x01, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
        {0x02, {AURORA, AURORA, CPRI6, CPRI5,
                CPRI4, CPRI3, CPRI2, CPRI1} },
        {0x04, {AURORA, AURORA, CPRI6, CPRI5,
@@ -26,6 +28,8 @@ static struct serdes_config serdes1_cfg_tbl[] = {
                CPRI4, CPRI3, CPRI2, CPRI1} },
        {0x06, {AURORA, AURORA, CPRI6, CPRI5,
                CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x07, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
        {0x08, {AURORA, AURORA, CPRI6, CPRI5,
                CPRI4, CPRI3, CPRI2, CPRI1} },
        {0x09, {AURORA, AURORA, CPRI6, CPRI5,
@@ -184,12 +188,17 @@ static struct serdes_config serdes1_cfg_tbl[] = {
                CPRI4, CPRI3, NONE, NONE} },
        {0x0F, {NONE, NONE, CPRI6, CPRI5,
                CPRI4, CPRI3, NONE, NONE} },
+       {0x17, {NONE, NONE,
+               SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
+               NONE, NONE, NONE, NONE} },
        {0x18, {NONE, NONE,
                SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
                NONE, NONE, NONE, NONE} },
        {0x1B, {NONE, NONE,
                SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
                NONE, NONE, NONE, NONE} },
+       {0x1D, {NONE, NONE, AURORA, AURORA,
+               NONE, NONE, NONE, NONE} },
        {0x1E, {NONE, NONE, AURORA, AURORA,
                NONE, NONE, NONE, NONE} },
        {0x21, {NONE, NONE, AURORA, AURORA,
@@ -199,19 +208,29 @@ static struct serdes_config serdes1_cfg_tbl[] = {
        {}
 };
 static struct serdes_config serdes2_cfg_tbl[] = {
+       {0x48, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+               SGMII_FM1_DTSEC3, AURORA,
+               NONE, NONE, NONE, NONE} },
        {0x49, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
                SGMII_FM1_DTSEC3, AURORA,
                NONE, NONE, NONE, NONE} },
        {0x4A, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
                SGMII_FM1_DTSEC3, AURORA,
                NONE, NONE, NONE, NONE} },
+       {0x6E, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+               AURORA, AURORA, NONE, NONE, NONE, NONE} },
        {0x6F, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
                AURORA, AURORA, NONE, NONE, NONE, NONE} },
        {0x70, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
                AURORA, AURORA, NONE, NONE, NONE, NONE} },
+       {0x99, {PCIE1, PCIE1,
+               SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
+               NONE, NONE, NONE, NONE} },
        {0x9A, {PCIE1, PCIE1,
                SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
                NONE, NONE, NONE, NONE} },
+       {0x9D, {PCIE1, PCIE1, PCIE1, PCIE1,
+               NONE, NONE, NONE, NONE} },
        {0x9E, {PCIE1, PCIE1, PCIE1, PCIE1,
                NONE, NONE, NONE, NONE} },
        {}