fsl/usb: Workaround for USB erratum-A007075

[u-boot] / arch / powerpc / cpu / mpc85xx / cpu_init.c

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 81aeadd363feade245665a6cf98f94ec378d0594..0a33e8dbc1f69f5c53b8e60e1059e99c1738ffa2 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -33,6 +33,9 @@
 #endif
 
 #include "../../../../drivers/block/fsl_sata.h"
+#ifdef CONFIG_U_QE
+#include "../../../../drivers/qe/qe.h"
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -84,7 +87,7 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy)
 #endif
 
 
-#ifdef CONFIG_QE
+#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
 extern qe_iop_conf_t qe_iop_conf_tab[];
 extern void qe_config_iopin(u8 port, u8 pin, int dir,
                                int open_drain, int assign);
@@ -173,17 +176,14 @@ void config_8560_ioports (volatile ccsr_cpm_t * cpm)
 #endif
 
 #ifdef CONFIG_SYS_FSL_CPC
-static void enable_cpc(void)
+#if defined(CONFIG_RAMBOOT_PBL) || defined(CONFIG_SYS_CPC_REINIT_F)
+static void disable_cpc_sram(void)
 {
        int i;
-       u32 size = 0;
 
        cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR;
 
        for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) {
-               u32 cpccfg0 = in_be32(&cpc->cpccfg0);
-               size += CPC_CFG0_SZ_K(cpccfg0);
-#ifdef CONFIG_RAMBOOT_PBL
                if (in_be32(&cpc->cpcsrcr0) & CPC_SRCR0_SRAMEN) {
                        /* find and disable LAW of SRAM */
                        struct law_entry law = find_law(CONFIG_SYS_INIT_L3_ADDR);
@@ -198,8 +198,21 @@ static void enable_cpc(void)
                        out_be32(&cpc->cpccsr0, 0);
                        out_be32(&cpc->cpcsrcr0, 0);
                }
+       }
+}
 #endif
 
+static void enable_cpc(void)
+{
+       int i;
+       u32 size = 0;
+
+       cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR;
+
+       for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) {
+               u32 cpccfg0 = in_be32(&cpc->cpccfg0);
+               size += CPC_CFG0_SZ_K(cpccfg0);
+
 #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
                setbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_TAG_ECC_SCRUB_DIS);
 #endif
@@ -298,6 +311,10 @@ void cpu_init_f (void)
        law = find_law(CONFIG_SYS_PBI_FLASH_BASE);
        if (law.index != -1)
                disable_law(law.index);
+
+#if defined(CONFIG_SYS_CPC_REINIT_F)
+       disable_cpc_sram();
+#endif
 #endif
 
 #ifdef CONFIG_CPM2
@@ -309,10 +326,12 @@ void cpu_init_f (void)
 #if defined(CONFIG_CPM2)
        m8560_cpm_reset();
 #endif
-#ifdef CONFIG_QE
+
+#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
        /* Config QE ioports */
        config_qe_ioports();
 #endif
+
 #if defined(CONFIG_FSL_DMA)
        dma_init();
 #endif
@@ -598,6 +617,9 @@ skip_l2:
        puts("disabled\n");
 #endif
 
+#if defined(CONFIG_RAMBOOT_PBL)
+       disable_cpc_sram();
+#endif
        enable_cpc();
 
 #ifndef CONFIG_SYS_FSL_NO_SERDES
@@ -767,8 +789,6 @@ skip_l2:
        return 0;
 }
 
-extern void setup_ivors(void);
-
 void arch_preboot_os(void)
 {
        u32 msr;
@@ -781,8 +801,6 @@ void arch_preboot_os(void)
        msr = mfmsr();
        msr &= ~(MSR_ME|MSR_CE);
        mtmsr(msr);
-
-       setup_ivors();
 }
 
 #if defined(CONFIG_CMD_SATA) && defined(CONFIG_FSL_SATA)
@@ -797,15 +815,20 @@ int sata_initialize(void)
 
 void cpu_secondary_init_r(void)
 {
-#ifdef CONFIG_QE
+#ifdef CONFIG_U_QE
+       uint qe_base = CONFIG_SYS_IMMR + 0x00140000; /* QE immr base */
+#elif defined CONFIG_QE
        uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */
+#endif
+
+#ifdef CONFIG_QE
 #ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
        int ret;
        size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
 
        /* load QE firmware from NAND flash to DDR first */
        ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FMAN_FW_IN_NAND,
-                       &fw_length, (u_char *)CONFIG_SYS_QE_FMAN_FW_ADDR);
+                       &fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR);
 
        if (ret && ret == -EUCLEAN) {
                printf ("NAND read for QE firmware at offset %x failed %d\n",