GCC4.6: Squash warnings in denali_spd_ddr2.c

[u-boot] / arch / powerpc / cpu / mpc85xx / cpu_init.c

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 27f836c3d2e310cfcdaff11a27fddda0bb629f6f..0a4ce538f3b3494bd262af16234d30fec21ca0f3 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -226,7 +226,9 @@ void cpu_init_f (void)
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 #endif
-
+#if defined(CONFIG_SECURE_BOOT)
+       struct law_entry law;
+#endif
 #ifdef CONFIG_MPC8548
        ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
        uint svr = get_svr();
@@ -244,6 +246,13 @@ void cpu_init_f (void)
        disable_tlb(14);
        disable_tlb(15);
 
+#if defined(CONFIG_SECURE_BOOT)
+       /* Disable the LAW created for NOR flash by the PBI commands */
+       law = find_law(CONFIG_SYS_PBI_FLASH_BASE);
+       if (law.index != -1)
+               disable_law(law.index);
+#endif
+
 #ifdef CONFIG_CPM2
        config_8560_ioports((ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR);
 #endif
@@ -454,6 +463,9 @@ skip_l2:
        clrsetbits_be32(&lbc->lcrr, LCRR_CLKDIV, CONFIG_SYS_LBC_LCRR);
        __raw_readl(&lbc->lcrr);
        isync();
+#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_LBC103
+       udelay(100);
+#endif
 #endif
 
 #ifdef CONFIG_SYS_FSL_USB1_PHY_ENABLE